)]}'
{
  "commit": "47740eb887796608fb4c629aa6b8507a2fb6c0eb",
  "tree": "3b772b4b5f3a09899ec27c131cfdace411c75d74",
  "parents": [
    "5d57c31e5790d44905af0459a21086dbad167d26"
  ],
  "author": {
    "name": "Ralf Baechle",
    "email": "ralf@linux-mips.org",
    "time": "Sun Apr 19 03:21:22 2009 +0200"
  },
  "committer": {
    "name": "Ralf Baechle",
    "email": "ralf@linux-mips.org",
    "time": "Thu May 14 13:50:26 2009 +0100"
  },
  "message": "MIPS: Enable CLO / CLZ instructions via separate CPU property\n\nThis is useful for IDT RC32332, RC32334 and NEC VR5500 processors which do\nnot implement the full MIPS32 / MIPS64 architecture.\n\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "bac4a960b24cbdaa6fde66fa2243b17dc5b31957",
      "old_mode": 33188,
      "old_path": "arch/mips/include/asm/bitops.h",
      "new_id": "b1e9e97a9c78a7835033c97b52d630a262d7924f",
      "new_mode": 33188,
      "new_path": "arch/mips/include/asm/bitops.h"
    },
    {
      "type": "modify",
      "old_id": "a0d14f85b7815958035a08894e8882274201aa2f",
      "old_mode": 33188,
      "old_path": "arch/mips/include/asm/cpu-features.h",
      "new_id": "c0047f861337f9cee157b73bd9fd36ea9259a517",
      "new_mode": 33188,
      "new_path": "arch/mips/include/asm/cpu-features.h"
    }
  ]
}