msm: qdss: rename ptm to etm
HW implementations for the ARM ETM specifications are referred to as ETM
(Embedded Trace Macrocell). Similarly HW implementations of the PFT
(Program Flow Trace) specifications are referred to as PTM (Program
Trace Macrocell).
Despite the above, ETM is a more popular name and commonly gets used to
refer to both ETM and PFT spec implementations. Moreover, PFT spec
register names use ETM as a qualifier.
Since it is possible, we will share the same driver for both PFT and ETM
spec implementations, just use the more familiar ETM as the name.
This change renames variables, strings, etc from PTM to ETM. This
completes the PTM to ETM renaming.
Change-Id: I95b6f041ef1988975ade534b5b503e23525db3a3
Signed-off-by: Pratik Patel <pratikp@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-8930.c b/arch/arm/mach-msm/board-8930.c
index 46c60ff..6a2a6dc 100644
--- a/arch/arm/mach-msm/board-8930.c
+++ b/arch/arm/mach-msm/board-8930.c
@@ -1796,7 +1796,7 @@
&msm_etb_device,
&msm_tpiu_device,
&msm_funnel_device,
- &msm_ptm_device,
+ &msm_etm_device,
#endif
&msm_device_dspcrashd_8960,
&msm8960_device_watchdog,
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index de42371..e2ba303 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -2183,7 +2183,7 @@
&msm_etb_device,
&msm_tpiu_device,
&msm_funnel_device,
- &msm_ptm_device,
+ &msm_etm_device,
#endif
&msm_device_dspcrashd_8960,
&msm8960_device_watchdog,
diff --git a/arch/arm/mach-msm/devices-8960.c b/arch/arm/mach-msm/devices-8960.c
index 4c02215..dbf26d9 100644
--- a/arch/arm/mach-msm/devices-8960.c
+++ b/arch/arm/mach-msm/devices-8960.c
@@ -3127,7 +3127,7 @@
#define MSM_ETB_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1000)
#define MSM_TPIU_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x3000)
#define MSM_FUNNEL_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x4000)
-#define MSM_PTM_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1C000)
+#define MSM_ETM_PHYS_BASE (MSM_QDSS_PHYS_BASE + 0x1C000)
static struct resource msm_etb_resources[] = {
{
@@ -3174,19 +3174,19 @@
.resource = msm_funnel_resources,
};
-static struct resource msm_ptm_resources[] = {
+static struct resource msm_etm_resources[] = {
{
- .start = MSM_PTM_PHYS_BASE,
- .end = MSM_PTM_PHYS_BASE + (SZ_4K * 2) - 1,
+ .start = MSM_ETM_PHYS_BASE,
+ .end = MSM_ETM_PHYS_BASE + (SZ_4K * 2) - 1,
.flags = IORESOURCE_MEM,
},
};
-struct platform_device msm_ptm_device = {
- .name = "msm_ptm",
+struct platform_device msm_etm_device = {
+ .name = "msm_etm",
.id = 0,
- .num_resources = ARRAY_SIZE(msm_ptm_resources),
- .resource = msm_ptm_resources,
+ .num_resources = ARRAY_SIZE(msm_etm_resources),
+ .resource = msm_etm_resources,
};
#endif
diff --git a/arch/arm/mach-msm/devices.h b/arch/arm/mach-msm/devices.h
index ab55a25..0a14db0 100644
--- a/arch/arm/mach-msm/devices.h
+++ b/arch/arm/mach-msm/devices.h
@@ -316,7 +316,7 @@
extern struct platform_device msm_etb_device;
extern struct platform_device msm_tpiu_device;
extern struct platform_device msm_funnel_device;
-extern struct platform_device msm_ptm_device;
+extern struct platform_device msm_etm_device;
#endif
extern struct platform_device msm_bus_8064_apps_fabric;
diff --git a/arch/arm/mach-msm/qdss-etm.c b/arch/arm/mach-msm/qdss-etm.c
index c0dc58e..8965333 100644
--- a/arch/arm/mach-msm/qdss-etm.c
+++ b/arch/arm/mach-msm/qdss-etm.c
@@ -30,10 +30,10 @@
#include "qdss.h"
-#define ptm_writel(ptm, cpu, val, off) \
- __raw_writel((val), ptm.base + (SZ_4K * cpu) + off)
-#define ptm_readl(ptm, cpu, off) \
- __raw_readl(ptm.base + (SZ_4K * cpu) + off)
+#define etm_writel(etm, cpu, val, off) \
+ __raw_writel((val), etm.base + (SZ_4K * cpu) + off)
+#define etm_readl(etm, cpu, off) \
+ __raw_readl(etm.base + (SZ_4K * cpu) + off)
/*
* Device registers:
@@ -99,20 +99,20 @@
#define ETMPDCR (0x310)
#define ETMPDSR (0x314)
-#define PTM_LOCK(cpu) \
+#define ETM_LOCK(cpu) \
do { \
mb(); \
- ptm_writel(ptm, cpu, 0x0, CS_LAR); \
+ etm_writel(etm, cpu, 0x0, CS_LAR); \
} while (0)
-#define PTM_UNLOCK(cpu) \
+#define ETM_UNLOCK(cpu) \
do { \
- ptm_writel(ptm, cpu, CS_UNLOCK_MAGIC, CS_LAR); \
+ etm_writel(etm, cpu, CS_UNLOCK_MAGIC, CS_LAR); \
mb(); \
} while (0)
/* Forward declarations */
-static void ptm_cfg_rw_init(void);
+static void etm_cfg_rw_init(void);
#ifdef CONFIG_MSM_QDSS_ETM_DEFAULT_ENABLE
static int trace_on_boot = 1;
@@ -123,7 +123,7 @@
trace_on_boot, trace_on_boot, int, S_IRUGO
);
-struct ptm_config {
+struct etm_config {
/* read only config registers */
uint32_t config_code;
/* derived values */
@@ -174,8 +174,8 @@
uint32_t vmid_comp_value;
};
-struct ptm_ctx {
- struct ptm_config cfg;
+struct etm_ctx {
+ struct etm_config cfg;
void __iomem *base;
bool trace_enabled;
struct wake_lock wake_lock;
@@ -184,7 +184,7 @@
struct device *dev;
};
-static struct ptm_ctx ptm;
+static struct etm_ctx etm;
/* ETM clock is derived from the processor clock and gets enabled on a
@@ -202,109 +202,109 @@
* clock vote in the driver and the save-restore code uses 1. above
* for its vote
*/
-static void ptm_set_powerdown(int cpu)
+static void etm_set_powerdown(int cpu)
{
uint32_t etmcr;
- etmcr = ptm_readl(ptm, cpu, ETMCR);
+ etmcr = etm_readl(etm, cpu, ETMCR);
etmcr |= BIT(0);
- ptm_writel(ptm, cpu, etmcr, ETMCR);
+ etm_writel(etm, cpu, etmcr, ETMCR);
}
-static void ptm_clear_powerdown(int cpu)
+static void etm_clear_powerdown(int cpu)
{
uint32_t etmcr;
- etmcr = ptm_readl(ptm, cpu, ETMCR);
+ etmcr = etm_readl(etm, cpu, ETMCR);
etmcr &= ~BIT(0);
- ptm_writel(ptm, cpu, etmcr, ETMCR);
+ etm_writel(etm, cpu, etmcr, ETMCR);
}
-static void ptm_set_prog(int cpu)
+static void etm_set_prog(int cpu)
{
uint32_t etmcr;
int count;
- etmcr = ptm_readl(ptm, cpu, ETMCR);
+ etmcr = etm_readl(etm, cpu, ETMCR);
etmcr |= BIT(10);
- ptm_writel(ptm, cpu, etmcr, ETMCR);
+ etm_writel(etm, cpu, etmcr, ETMCR);
- for (count = TIMEOUT_US; BVAL(ptm_readl(ptm, cpu, ETMSR), 1) != 1
+ for (count = TIMEOUT_US; BVAL(etm_readl(etm, cpu, ETMSR), 1) != 1
&& count > 0; count--)
udelay(1);
WARN(count == 0, "timeout while setting prog bit\n");
}
-static void ptm_clear_prog(int cpu)
+static void etm_clear_prog(int cpu)
{
uint32_t etmcr;
int count;
- etmcr = ptm_readl(ptm, cpu, ETMCR);
+ etmcr = etm_readl(etm, cpu, ETMCR);
etmcr &= ~BIT(10);
- ptm_writel(ptm, cpu, etmcr, ETMCR);
+ etm_writel(etm, cpu, etmcr, ETMCR);
- for (count = TIMEOUT_US; BVAL(ptm_readl(ptm, cpu, ETMSR), 1) != 0
+ for (count = TIMEOUT_US; BVAL(etm_readl(etm, cpu, ETMSR), 1) != 0
&& count > 0; count--)
udelay(1);
WARN(count == 0, "timeout while clearing prog bit\n");
}
-static void __ptm_trace_enable(int cpu)
+static void __etm_trace_enable(int cpu)
{
int i;
- PTM_UNLOCK(cpu);
+ ETM_UNLOCK(cpu);
/* Vote for ETM power/clock enable */
- ptm_clear_powerdown(cpu);
- ptm_set_prog(cpu);
+ etm_clear_powerdown(cpu);
+ etm_set_prog(cpu);
- ptm_writel(ptm, cpu, ptm.cfg.main_control | BIT(10), ETMCR);
- ptm_writel(ptm, cpu, ptm.cfg.trigger_event, ETMTRIGGER);
- ptm_writel(ptm, cpu, ptm.cfg.te_start_stop_control, ETMTSSCR);
- ptm_writel(ptm, cpu, ptm.cfg.te_event, ETMTEEVR);
- ptm_writel(ptm, cpu, ptm.cfg.te_control, ETMTECR1);
- ptm_writel(ptm, cpu, ptm.cfg.fifofull_level, ETMFFLR);
- for (i = 0; i < ptm.cfg.nr_addr_comp; i++) {
- ptm_writel(ptm, cpu, ptm.cfg.addr_comp_value[i], ETMACVRn(i));
- ptm_writel(ptm, cpu, ptm.cfg.addr_comp_access_type[i],
+ etm_writel(etm, cpu, etm.cfg.main_control | BIT(10), ETMCR);
+ etm_writel(etm, cpu, etm.cfg.trigger_event, ETMTRIGGER);
+ etm_writel(etm, cpu, etm.cfg.te_start_stop_control, ETMTSSCR);
+ etm_writel(etm, cpu, etm.cfg.te_event, ETMTEEVR);
+ etm_writel(etm, cpu, etm.cfg.te_control, ETMTECR1);
+ etm_writel(etm, cpu, etm.cfg.fifofull_level, ETMFFLR);
+ for (i = 0; i < etm.cfg.nr_addr_comp; i++) {
+ etm_writel(etm, cpu, etm.cfg.addr_comp_value[i], ETMACVRn(i));
+ etm_writel(etm, cpu, etm.cfg.addr_comp_access_type[i],
ETMACTRn(i));
}
- for (i = 0; i < ptm.cfg.nr_cntr; i++) {
- ptm_writel(ptm, cpu, ptm.cfg.cntr_reload_value[i],
+ for (i = 0; i < etm.cfg.nr_cntr; i++) {
+ etm_writel(etm, cpu, etm.cfg.cntr_reload_value[i],
ETMCNTRLDVRn(i));
- ptm_writel(ptm, cpu, ptm.cfg.cntr_enable_event[i],
+ etm_writel(etm, cpu, etm.cfg.cntr_enable_event[i],
ETMCNTENRn(i));
- ptm_writel(ptm, cpu, ptm.cfg.cntr_reload_event[i],
+ etm_writel(etm, cpu, etm.cfg.cntr_reload_event[i],
ETMCNTRLDEVRn(i));
- ptm_writel(ptm, cpu, ptm.cfg.cntr_value[i], ETMCNTVRn(i));
+ etm_writel(etm, cpu, etm.cfg.cntr_value[i], ETMCNTVRn(i));
}
- ptm_writel(ptm, cpu, ptm.cfg.seq_state_12_event, ETMSQ12EVR);
- ptm_writel(ptm, cpu, ptm.cfg.seq_state_21_event, ETMSQ21EVR);
- ptm_writel(ptm, cpu, ptm.cfg.seq_state_23_event, ETMSQ23EVR);
- ptm_writel(ptm, cpu, ptm.cfg.seq_state_32_event, ETMSQ32EVR);
- ptm_writel(ptm, cpu, ptm.cfg.seq_state_13_event, ETMSQ13EVR);
- ptm_writel(ptm, cpu, ptm.cfg.seq_state_31_event, ETMSQ31EVR);
- ptm_writel(ptm, cpu, ptm.cfg.current_seq_state, ETMSQR);
- for (i = 0; i < ptm.cfg.nr_ext_output; i++)
- ptm_writel(ptm, cpu, ptm.cfg.ext_output_event[i],
+ etm_writel(etm, cpu, etm.cfg.seq_state_12_event, ETMSQ12EVR);
+ etm_writel(etm, cpu, etm.cfg.seq_state_21_event, ETMSQ21EVR);
+ etm_writel(etm, cpu, etm.cfg.seq_state_23_event, ETMSQ23EVR);
+ etm_writel(etm, cpu, etm.cfg.seq_state_32_event, ETMSQ32EVR);
+ etm_writel(etm, cpu, etm.cfg.seq_state_13_event, ETMSQ13EVR);
+ etm_writel(etm, cpu, etm.cfg.seq_state_31_event, ETMSQ31EVR);
+ etm_writel(etm, cpu, etm.cfg.current_seq_state, ETMSQR);
+ for (i = 0; i < etm.cfg.nr_ext_output; i++)
+ etm_writel(etm, cpu, etm.cfg.ext_output_event[i],
ETMEXTOUTEVRn(i));
- for (i = 0; i < ptm.cfg.nr_context_id_comp; i++)
- ptm_writel(ptm, cpu, ptm.cfg.context_id_comp_value[i],
+ for (i = 0; i < etm.cfg.nr_context_id_comp; i++)
+ etm_writel(etm, cpu, etm.cfg.context_id_comp_value[i],
ETMCIDCVRn(i));
- ptm_writel(ptm, cpu, ptm.cfg.context_id_comp_mask, ETMCIDCMR);
- ptm_writel(ptm, cpu, ptm.cfg.sync_freq, ETMSYNCFR);
- ptm_writel(ptm, cpu, ptm.cfg.extnd_ext_input_sel, ETMEXTINSELR);
- ptm_writel(ptm, cpu, ptm.cfg.ts_event, ETMTSEVR);
- ptm_writel(ptm, cpu, ptm.cfg.aux_control, ETMAUXCR);
- ptm_writel(ptm, cpu, cpu+1, ETMTRACEIDR);
- ptm_writel(ptm, cpu, ptm.cfg.vmid_comp_value, ETMVMIDCVR);
+ etm_writel(etm, cpu, etm.cfg.context_id_comp_mask, ETMCIDCMR);
+ etm_writel(etm, cpu, etm.cfg.sync_freq, ETMSYNCFR);
+ etm_writel(etm, cpu, etm.cfg.extnd_ext_input_sel, ETMEXTINSELR);
+ etm_writel(etm, cpu, etm.cfg.ts_event, ETMTSEVR);
+ etm_writel(etm, cpu, etm.cfg.aux_control, ETMAUXCR);
+ etm_writel(etm, cpu, cpu+1, ETMTRACEIDR);
+ etm_writel(etm, cpu, etm.cfg.vmid_comp_value, ETMVMIDCVR);
- ptm_clear_prog(cpu);
- PTM_LOCK(cpu);
+ etm_clear_prog(cpu);
+ ETM_LOCK(cpu);
}
-static int ptm_trace_enable(void)
+static int etm_trace_enable(void)
{
int ret, cpu;
@@ -312,7 +312,7 @@
if (ret)
return ret;
- wake_lock(&ptm.wake_lock);
+ wake_lock(&etm.wake_lock);
/* 1. causes all online cpus to come out of idle PC
* 2. prevents idle PC until save restore flag is enabled atomically
*
@@ -320,7 +320,7 @@
* operation and to ensure cores where trace is expected to be turned
* on are already hotplugged on
*/
- pm_qos_update_request(&ptm.qos_req, 0);
+ pm_qos_update_request(&etm.qos_req, 0);
etb_disable();
tpiu_disable();
@@ -328,34 +328,34 @@
etb_enable();
funnel_enable(0x0, 0x3);
for_each_online_cpu(cpu)
- __ptm_trace_enable(cpu);
+ __etm_trace_enable(cpu);
- ptm.trace_enabled = true;
+ etm.trace_enabled = true;
- pm_qos_update_request(&ptm.qos_req, PM_QOS_DEFAULT_VALUE);
- wake_unlock(&ptm.wake_lock);
+ pm_qos_update_request(&etm.qos_req, PM_QOS_DEFAULT_VALUE);
+ wake_unlock(&etm.wake_lock);
return 0;
}
-static void __ptm_trace_disable(int cpu)
+static void __etm_trace_disable(int cpu)
{
- PTM_UNLOCK(cpu);
- ptm_set_prog(cpu);
+ ETM_UNLOCK(cpu);
+ etm_set_prog(cpu);
/* program trace enable to low by using always false event */
- ptm_writel(ptm, cpu, 0x6F | BIT(14), ETMTEEVR);
+ etm_writel(etm, cpu, 0x6F | BIT(14), ETMTEEVR);
/* Vote for ETM power/clock disable */
- ptm_set_powerdown(cpu);
- PTM_LOCK(cpu);
+ etm_set_powerdown(cpu);
+ ETM_LOCK(cpu);
}
-static void ptm_trace_disable(void)
+static void etm_trace_disable(void)
{
int cpu;
- wake_lock(&ptm.wake_lock);
+ wake_lock(&etm.wake_lock);
/* 1. causes all online cpus to come out of idle PC
* 2. prevents idle PC until save restore flag is disabled atomically
*
@@ -363,59 +363,59 @@
* operation and to ensure cores where trace is expected to be turned
* off are already hotplugged on
*/
- pm_qos_update_request(&ptm.qos_req, 0);
+ pm_qos_update_request(&etm.qos_req, 0);
for_each_online_cpu(cpu)
- __ptm_trace_disable(cpu);
+ __etm_trace_disable(cpu);
etb_dump();
etb_disable();
funnel_disable(0x0, 0x3);
- ptm.trace_enabled = false;
+ etm.trace_enabled = false;
- pm_qos_update_request(&ptm.qos_req, PM_QOS_DEFAULT_VALUE);
- wake_unlock(&ptm.wake_lock);
+ pm_qos_update_request(&etm.qos_req, PM_QOS_DEFAULT_VALUE);
+ wake_unlock(&etm.wake_lock);
qdss_clk_disable();
}
-static int ptm_open(struct inode *inode, struct file *file)
+static int etm_open(struct inode *inode, struct file *file)
{
- if (atomic_cmpxchg(&ptm.in_use, 0, 1))
+ if (atomic_cmpxchg(&etm.in_use, 0, 1))
return -EBUSY;
- dev_dbg(ptm.dev, "%s: successfully opened\n", __func__);
+ dev_dbg(etm.dev, "%s: successfully opened\n", __func__);
return 0;
}
-static void ptm_range_filter(char range, uint32_t reg1,
+static void etm_range_filter(char range, uint32_t reg1,
uint32_t addr1, uint32_t reg2, uint32_t addr2)
{
- ptm.cfg.addr_comp_value[reg1] = addr1;
- ptm.cfg.addr_comp_value[reg2] = addr2;
+ etm.cfg.addr_comp_value[reg1] = addr1;
+ etm.cfg.addr_comp_value[reg2] = addr2;
- ptm.cfg.te_control |= (1 << (reg1/2));
+ etm.cfg.te_control |= (1 << (reg1/2));
if (range == 'i')
- ptm.cfg.te_control &= ~BIT(24);
+ etm.cfg.te_control &= ~BIT(24);
else if (range == 'e')
- ptm.cfg.te_control |= BIT(24);
+ etm.cfg.te_control |= BIT(24);
}
-static void ptm_start_stop_filter(char start_stop,
+static void etm_start_stop_filter(char start_stop,
uint32_t reg, uint32_t addr)
{
- ptm.cfg.addr_comp_value[reg] = addr;
+ etm.cfg.addr_comp_value[reg] = addr;
if (start_stop == 's')
- ptm.cfg.te_start_stop_control |= (1 << reg);
+ etm.cfg.te_start_stop_control |= (1 << reg);
else if (start_stop == 't')
- ptm.cfg.te_start_stop_control |= (1 << (reg + 16));
+ etm.cfg.te_start_stop_control |= (1 << (reg + 16));
- ptm.cfg.te_control |= BIT(25);
+ etm.cfg.te_control |= BIT(25);
}
#define MAX_COMMAND_STRLEN 40
-static ssize_t ptm_write(struct file *file, const char __user *data,
+static ssize_t etm_write(struct file *file, const char __user *data,
size_t len, loff_t *ppos)
{
char command[MAX_COMMAND_STRLEN];
@@ -424,36 +424,36 @@
unsigned long addr1, addr2;
str_len = strnlen_user(data, MAX_COMMAND_STRLEN);
- dev_dbg(ptm.dev, "string length: %d", str_len);
+ dev_dbg(etm.dev, "string length: %d", str_len);
if (str_len == 0 || str_len == (MAX_COMMAND_STRLEN+1)) {
- dev_err(ptm.dev, "error in str_len: %d", str_len);
+ dev_err(etm.dev, "error in str_len: %d", str_len);
return -EFAULT;
}
/* includes the null character */
if (copy_from_user(command, data, str_len)) {
- dev_err(ptm.dev, "error in copy_from_user: %d", str_len);
+ dev_err(etm.dev, "error in copy_from_user: %d", str_len);
return -EFAULT;
}
- dev_dbg(ptm.dev, "input = %s", command);
+ dev_dbg(etm.dev, "input = %s", command);
switch (command[0]) {
case '0':
- if (ptm.trace_enabled) {
- ptm_trace_disable();
- dev_info(ptm.dev, "tracing disabled\n");
+ if (etm.trace_enabled) {
+ etm_trace_disable();
+ dev_info(etm.dev, "tracing disabled\n");
} else
- dev_err(ptm.dev, "trace already disabled\n");
+ dev_err(etm.dev, "trace already disabled\n");
break;
case '1':
- if (!ptm.trace_enabled) {
- if (!ptm_trace_enable())
- dev_info(ptm.dev, "tracing enabled\n");
+ if (!etm.trace_enabled) {
+ if (!etm_trace_enable())
+ dev_info(etm.dev, "tracing enabled\n");
else
- dev_err(ptm.dev, "error enabling trace\n");
+ dev_err(etm.dev, "error enabling trace\n");
} else
- dev_err(ptm.dev, "trace already enabled\n");
+ dev_err(etm.dev, "trace already enabled\n");
break;
case 'f':
switch (command[2]) {
@@ -465,7 +465,7 @@
goto err_out;
if (reg1 > 7 || reg2 > 7 || (reg1 % 2))
goto err_out;
- ptm_range_filter('i',
+ etm_range_filter('i',
reg1, addr1, reg2, addr2);
break;
case 'e':
@@ -475,7 +475,7 @@
if (reg1 > 7 || reg2 > 7 || (reg1 % 2)
|| command[2] == 'd')
goto err_out;
- ptm_range_filter('e',
+ etm_range_filter('e',
reg1, addr1, reg2, addr2);
break;
case 's':
@@ -484,7 +484,7 @@
goto err_out;
if (reg1 > 7)
goto err_out;
- ptm_start_stop_filter('s', reg1, addr1);
+ etm_start_stop_filter('s', reg1, addr1);
break;
case 't':
if (sscanf(&command[6], "%lx:%lx\\0",
@@ -492,14 +492,14 @@
goto err_out;
if (reg1 > 7)
goto err_out;
- ptm_start_stop_filter('t', reg1, addr1);
+ etm_start_stop_filter('t', reg1, addr1);
break;
default:
goto err_out;
}
break;
case 'r':
- ptm_cfg_rw_init();
+ etm_cfg_rw_init();
break;
default:
goto err_out;
@@ -515,67 +515,67 @@
return -EFAULT;
}
-static int ptm_release(struct inode *inode, struct file *file)
+static int etm_release(struct inode *inode, struct file *file)
{
- atomic_set(&ptm.in_use, 0);
- dev_dbg(ptm.dev, "%s: released\n", __func__);
+ atomic_set(&etm.in_use, 0);
+ dev_dbg(etm.dev, "%s: released\n", __func__);
return 0;
}
-static const struct file_operations ptm_fops = {
+static const struct file_operations etm_fops = {
.owner = THIS_MODULE,
- .open = ptm_open,
- .write = ptm_write,
- .release = ptm_release,
+ .open = etm_open,
+ .write = etm_write,
+ .release = etm_release,
};
-static struct miscdevice ptm_misc = {
- .name = "msm_ptm",
+static struct miscdevice etm_misc = {
+ .name = "msm_etm",
.minor = MISC_DYNAMIC_MINOR,
- .fops = &ptm_fops,
+ .fops = &etm_fops,
};
-static void ptm_cfg_rw_init(void)
+static void etm_cfg_rw_init(void)
{
int i;
- ptm.cfg.main_control = 0x00001000;
- ptm.cfg.trigger_event = 0x0000406F;
- ptm.cfg.te_start_stop_control = 0x00000000;
- ptm.cfg.te_event = 0x0000006F;
- ptm.cfg.te_control = 0x01000000;
- ptm.cfg.fifofull_level = 0x00000028;
- for (i = 0; i < ptm.cfg.nr_addr_comp; i++) {
- ptm.cfg.addr_comp_value[i] = 0x00000000;
- ptm.cfg.addr_comp_access_type[i] = 0x00000000;
+ etm.cfg.main_control = 0x00001000;
+ etm.cfg.trigger_event = 0x0000406F;
+ etm.cfg.te_start_stop_control = 0x00000000;
+ etm.cfg.te_event = 0x0000006F;
+ etm.cfg.te_control = 0x01000000;
+ etm.cfg.fifofull_level = 0x00000028;
+ for (i = 0; i < etm.cfg.nr_addr_comp; i++) {
+ etm.cfg.addr_comp_value[i] = 0x00000000;
+ etm.cfg.addr_comp_access_type[i] = 0x00000000;
}
- for (i = 0; i < ptm.cfg.nr_cntr; i++) {
- ptm.cfg.cntr_reload_value[i] = 0x00000000;
- ptm.cfg.cntr_enable_event[i] = 0x0000406F;
- ptm.cfg.cntr_reload_event[i] = 0x0000406F;
- ptm.cfg.cntr_value[i] = 0x00000000;
+ for (i = 0; i < etm.cfg.nr_cntr; i++) {
+ etm.cfg.cntr_reload_value[i] = 0x00000000;
+ etm.cfg.cntr_enable_event[i] = 0x0000406F;
+ etm.cfg.cntr_reload_event[i] = 0x0000406F;
+ etm.cfg.cntr_value[i] = 0x00000000;
}
- ptm.cfg.seq_state_12_event = 0x0000406F;
- ptm.cfg.seq_state_21_event = 0x0000406F;
- ptm.cfg.seq_state_23_event = 0x0000406F;
- ptm.cfg.seq_state_32_event = 0x0000406F;
- ptm.cfg.seq_state_13_event = 0x0000406F;
- ptm.cfg.seq_state_31_event = 0x0000406F;
- ptm.cfg.current_seq_state = 0x00000000;
- for (i = 0; i < ptm.cfg.nr_ext_output; i++)
- ptm.cfg.ext_output_event[i] = 0x0000406F;
- for (i = 0; i < ptm.cfg.nr_context_id_comp; i++)
- ptm.cfg.context_id_comp_value[i] = 0x00000000;
- ptm.cfg.context_id_comp_mask = 0x00000000;
- ptm.cfg.sync_freq = 0x00000080;
- ptm.cfg.extnd_ext_input_sel = 0x00000000;
- ptm.cfg.ts_event = 0x0000406F;
- ptm.cfg.aux_control = 0x00000000;
- ptm.cfg.vmid_comp_value = 0x00000000;
+ etm.cfg.seq_state_12_event = 0x0000406F;
+ etm.cfg.seq_state_21_event = 0x0000406F;
+ etm.cfg.seq_state_23_event = 0x0000406F;
+ etm.cfg.seq_state_32_event = 0x0000406F;
+ etm.cfg.seq_state_13_event = 0x0000406F;
+ etm.cfg.seq_state_31_event = 0x0000406F;
+ etm.cfg.current_seq_state = 0x00000000;
+ for (i = 0; i < etm.cfg.nr_ext_output; i++)
+ etm.cfg.ext_output_event[i] = 0x0000406F;
+ for (i = 0; i < etm.cfg.nr_context_id_comp; i++)
+ etm.cfg.context_id_comp_value[i] = 0x00000000;
+ etm.cfg.context_id_comp_mask = 0x00000000;
+ etm.cfg.sync_freq = 0x00000080;
+ etm.cfg.extnd_ext_input_sel = 0x00000000;
+ etm.cfg.ts_event = 0x0000406F;
+ etm.cfg.aux_control = 0x00000000;
+ etm.cfg.vmid_comp_value = 0x00000000;
}
/* Memory mapped writes to clear os lock not supported */
-static void ptm_os_unlock(void *unused)
+static void etm_os_unlock(void *unused)
{
unsigned long value = 0x0;
@@ -583,42 +583,42 @@
asm("isb\n\t");
}
-static void ptm_cfg_ro_init(void)
+static void etm_cfg_ro_init(void)
{
/* use cpu 0 for setup */
int cpu = 0;
/* Unlock OS lock first to allow memory mapped reads and writes */
- ptm_os_unlock(NULL);
- smp_call_function(ptm_os_unlock, NULL, 1);
- PTM_UNLOCK(cpu);
+ etm_os_unlock(NULL);
+ smp_call_function(etm_os_unlock, NULL, 1);
+ ETM_UNLOCK(cpu);
/* Vote for ETM power/clock enable */
- ptm_clear_powerdown(cpu);
- ptm_set_prog(cpu);
+ etm_clear_powerdown(cpu);
+ etm_set_prog(cpu);
/* find all capabilities */
- ptm.cfg.config_code = ptm_readl(ptm, cpu, ETMCCR);
- ptm.cfg.nr_addr_comp = BMVAL(ptm.cfg.config_code, 0, 3) * 2;
- ptm.cfg.nr_cntr = BMVAL(ptm.cfg.config_code, 13, 15);
- ptm.cfg.nr_ext_input = BMVAL(ptm.cfg.config_code, 17, 19);
- ptm.cfg.nr_ext_output = BMVAL(ptm.cfg.config_code, 20, 22);
- ptm.cfg.nr_context_id_comp = BMVAL(ptm.cfg.config_code, 24, 25);
+ etm.cfg.config_code = etm_readl(etm, cpu, ETMCCR);
+ etm.cfg.nr_addr_comp = BMVAL(etm.cfg.config_code, 0, 3) * 2;
+ etm.cfg.nr_cntr = BMVAL(etm.cfg.config_code, 13, 15);
+ etm.cfg.nr_ext_input = BMVAL(etm.cfg.config_code, 17, 19);
+ etm.cfg.nr_ext_output = BMVAL(etm.cfg.config_code, 20, 22);
+ etm.cfg.nr_context_id_comp = BMVAL(etm.cfg.config_code, 24, 25);
- ptm.cfg.config_code_extn = ptm_readl(ptm, cpu, ETMCCER);
- ptm.cfg.nr_extnd_ext_input_sel =
- BMVAL(ptm.cfg.config_code_extn, 0, 2);
- ptm.cfg.nr_instr_resources = BMVAL(ptm.cfg.config_code_extn, 13, 15);
+ etm.cfg.config_code_extn = etm_readl(etm, cpu, ETMCCER);
+ etm.cfg.nr_extnd_ext_input_sel =
+ BMVAL(etm.cfg.config_code_extn, 0, 2);
+ etm.cfg.nr_instr_resources = BMVAL(etm.cfg.config_code_extn, 13, 15);
- ptm.cfg.system_config = ptm_readl(ptm, cpu, ETMSCR);
- ptm.cfg.fifofull_supported = BVAL(ptm.cfg.system_config, 8);
- ptm.cfg.nr_procs_supported = BMVAL(ptm.cfg.system_config, 12, 14);
+ etm.cfg.system_config = etm_readl(etm, cpu, ETMSCR);
+ etm.cfg.fifofull_supported = BVAL(etm.cfg.system_config, 8);
+ etm.cfg.nr_procs_supported = BMVAL(etm.cfg.system_config, 12, 14);
/* Vote for ETM power/clock disable */
- ptm_set_powerdown(cpu);
- PTM_LOCK(cpu);
+ etm_set_powerdown(cpu);
+ ETM_LOCK(cpu);
}
-static int __devinit ptm_probe(struct platform_device *pdev)
+static int __devinit etm_probe(struct platform_device *pdev)
{
int ret;
struct resource *res;
@@ -629,15 +629,15 @@
goto err_res;
}
- ptm.base = ioremap_nocache(res->start, resource_size(res));
- if (!ptm.base) {
+ etm.base = ioremap_nocache(res->start, resource_size(res));
+ if (!etm.base) {
ret = -EINVAL;
goto err_ioremap;
}
- ptm.dev = &pdev->dev;
+ etm.dev = &pdev->dev;
- ret = misc_register(&ptm_misc);
+ ret = misc_register(&etm_misc);
if (ret)
goto err_misc;
@@ -645,64 +645,64 @@
if (ret)
goto err_clk;
- ptm_cfg_ro_init();
- ptm_cfg_rw_init();
+ etm_cfg_ro_init();
+ etm_cfg_rw_init();
- ptm.trace_enabled = false;
+ etm.trace_enabled = false;
- wake_lock_init(&ptm.wake_lock, WAKE_LOCK_SUSPEND, "msm_ptm");
- pm_qos_add_request(&ptm.qos_req, PM_QOS_CPU_DMA_LATENCY,
+ wake_lock_init(&etm.wake_lock, WAKE_LOCK_SUSPEND, "msm_etm");
+ pm_qos_add_request(&etm.qos_req, PM_QOS_CPU_DMA_LATENCY,
PM_QOS_DEFAULT_VALUE);
- atomic_set(&ptm.in_use, 0);
+ atomic_set(&etm.in_use, 0);
qdss_clk_disable();
- dev_info(ptm.dev, "PTM intialized.\n");
+ dev_info(etm.dev, "ETM intialized.\n");
if (trace_on_boot) {
- if (!ptm_trace_enable())
- dev_info(ptm.dev, "tracing enabled\n");
+ if (!etm_trace_enable())
+ dev_info(etm.dev, "tracing enabled\n");
else
- dev_err(ptm.dev, "error enabling trace\n");
+ dev_err(etm.dev, "error enabling trace\n");
}
return 0;
err_clk:
- misc_deregister(&ptm_misc);
+ misc_deregister(&etm_misc);
err_misc:
- iounmap(ptm.base);
+ iounmap(etm.base);
err_ioremap:
err_res:
return ret;
}
-static int ptm_remove(struct platform_device *pdev)
+static int etm_remove(struct platform_device *pdev)
{
- if (ptm.trace_enabled)
- ptm_trace_disable();
- pm_qos_remove_request(&ptm.qos_req);
- wake_lock_destroy(&ptm.wake_lock);
- misc_deregister(&ptm_misc);
- iounmap(ptm.base);
+ if (etm.trace_enabled)
+ etm_trace_disable();
+ pm_qos_remove_request(&etm.qos_req);
+ wake_lock_destroy(&etm.wake_lock);
+ misc_deregister(&etm_misc);
+ iounmap(etm.base);
return 0;
}
-static struct platform_driver ptm_driver = {
- .probe = ptm_probe,
- .remove = ptm_remove,
+static struct platform_driver etm_driver = {
+ .probe = etm_probe,
+ .remove = etm_remove,
.driver = {
- .name = "msm_ptm",
+ .name = "msm_etm",
},
};
-int __init ptm_init(void)
+int __init etm_init(void)
{
- return platform_driver_register(&ptm_driver);
+ return platform_driver_register(&etm_driver);
}
-void ptm_exit(void)
+void etm_exit(void)
{
- platform_driver_unregister(&ptm_driver);
+ platform_driver_unregister(&etm_driver);
}
diff --git a/arch/arm/mach-msm/qdss.c b/arch/arm/mach-msm/qdss.c
index 55d14cd..5917964 100644
--- a/arch/arm/mach-msm/qdss.c
+++ b/arch/arm/mach-msm/qdss.c
@@ -71,13 +71,12 @@
ret = funnel_init();
if (ret)
goto err_funnel;
- ret = ptm_init();
+ ret = etm_init();
if (ret)
- goto err_ptm;
+ goto err_etm;
return 0;
-
-err_ptm:
+err_etm:
funnel_exit();
err_funnel:
tpiu_exit();
@@ -90,7 +89,7 @@
static void __exit qdss_exit(void)
{
- ptm_exit();
+ etm_exit();
funnel_exit();
tpiu_exit();
etb_exit();
diff --git a/arch/arm/mach-msm/qdss.h b/arch/arm/mach-msm/qdss.h
index 199222a..5f33664 100644
--- a/arch/arm/mach-msm/qdss.h
+++ b/arch/arm/mach-msm/qdss.h
@@ -64,8 +64,8 @@
void tpiu_exit(void);
int funnel_init(void);
void funnel_exit(void);
-int ptm_init(void);
-void ptm_exit(void);
+int etm_init(void);
+void etm_exit(void);
void etb_enable(void);
void etb_disable(void);