board: msm7x27a: Configure SDC2 GPIOs (in sleep state) correctly
SDC2 GPIOs have external pull up through VREG_S3 which is always on
regulator. Configuring SDC2 GPIOs (CLK, CMD, DAT) as PULL_DOWN
during sleep (when wifi is disabled) cause leakage current. Fix this
by configuring them as PULL_UP. This also ensures that the GPIOs
from host side are always active high as per SDIO spec.
Change-Id: Ibcc16bd92ab872bdbdeb814b95e901487c5fc224
Signed-off-by: Sujit Reddy Thumma <sthumma@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-msm7627a-storage.c b/arch/arm/mach-msm/board-msm7627a-storage.c
index 93a6178..a10d81a 100644
--- a/arch/arm/mach-msm/board-msm7627a-storage.c
+++ b/arch/arm/mach-msm/board-msm7627a-storage.c
@@ -72,17 +72,17 @@
};
static struct msm_gpio sdc2_sleep_cfg_data[] = {
- {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ {GPIO_CFG(62, 0, GPIO_CFG_INPUT, GPIO_CFG_NO_PULL, GPIO_CFG_2MA),
"sdc2_clk"},
- {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ {GPIO_CFG(63, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
"sdc2_cmd"},
- {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ {GPIO_CFG(64, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
"sdc2_dat_3"},
- {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ {GPIO_CFG(65, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
"sdc2_dat_2"},
- {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ {GPIO_CFG(66, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
"sdc2_dat_1"},
- {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_DOWN, GPIO_CFG_2MA),
+ {GPIO_CFG(67, 0, GPIO_CFG_INPUT, GPIO_CFG_PULL_UP, GPIO_CFG_2MA),
"sdc2_dat_0"},
};
static struct msm_gpio sdc3_cfg_data[] = {