ARM: mm: add dmb in l2xo_resume
Add dmb after l2xo_inv_all to make sure that l2xo is invalidated
before enabling the cache.
Change-Id: Ic45bd6fd20963ac9e596a58fdd357cedf1dd2aad
Signed-off-by: Anji jonnala <anjir@codeaurora.org>
diff --git a/arch/arm/mm/cache-l2x0.c b/arch/arm/mm/cache-l2x0.c
index bc5ffce..5c24578 100644
--- a/arch/arm/mm/cache-l2x0.c
+++ b/arch/arm/mm/cache-l2x0.c
@@ -484,6 +484,16 @@
/* Invalidate the cache */
l2x0_inv_all();
+ /*
+ * TBD: make sure that l2xo_inv_all finished
+ * before actually enabling the cache. Logically this
+ * is not required as cache sync is atomic operation.
+ * but on 8x25, observed the random crashes and they go
+ * away if we add dmb or disable the L2.
+ * keeping this as temporary workaround until root
+ * cause is find out.
+ */
+ dmb();
}
/* Enable the cache */