commit 4e484e7dc5856ff5086b6329d82e36d4adaf1f02
author Michel Dänzer <daenzer@vmware.com> Tue Jun 16 17:29:06 2009 +0200
committer Dave Airlie <airlied@redhat.com> Fri Jun 19 09:28:20 2009 +1000
tree ca8d91c03f89732c36f44b30d01927802f4fa767
parent 62369028c7e2039b821799b3db52f0d622f0e8b5

radeon: Fix CP byte order on big endian architectures with KMS.

Signed-off-by: Dave Airlie <airlied@redhat.com>

drivers/gpu/drm/radeon/r100.c

diff --git a/drivers/gpu/drm/radeon/r100.c b/drivers/gpu/drm/radeon/r100.c
index 8f41f70..64a692c0 100644
--- a/drivers/gpu/drm/radeon/r100.c
+++ b/drivers/gpu/drm/radeon/r100.c
@@ -551,6 +551,9 @@
 	/* cp setup */
 	WREG32(0x718, pre_write_timer | (pre_write_limit << 28));
 	WREG32(RADEON_CP_RB_CNTL,
+#ifdef __BIG_ENDIAN
+	       RADEON_BUF_SWAP_32BIT |
+#endif
 	       REG_SET(RADEON_RB_BUFSZ, rb_bufsz) |
 	       REG_SET(RADEON_RB_BLKSZ, rb_blksz) |
 	       REG_SET(RADEON_MAX_FETCH, max_fetch) |