)]}'
{
  "commit": "51e02b02e650183ff1277bcbad6a01d6ea0e9edb",
  "tree": "413dfa5c93e2d01a42309f1cee6d6bf26d871962",
  "parents": [
    "eeb09e6545bf68222798ccf3f355560a9e406435"
  ],
  "author": {
    "name": "Manuel Lauss",
    "email": "manuel.lauss@googlemail.com",
    "time": "Sat Jun 06 14:09:55 2009 +0200"
  },
  "committer": {
    "name": "Ralf Baechle",
    "email": "ralf@linux-mips.org",
    "time": "Wed Jun 17 11:06:28 2009 +0100"
  },
  "message": "MIPS: Alchemy: Rewrite GPIO support.\n\nThe current in-kernel Alchemy GPIO support is far too inflexible for\nall my use cases.  To address this, the following changes are made:\n\n* create generic functions which deal with manipulating the on-chip\n  GPIO1/2 blocks.  Such functions are universally useful.\n* Macros for GPIO2 shared interrupt management and block control.\n* support for both built-in CONFIG_GPIOLIB and fast, inlined GPIO macros.\n\n  If CONFIG_GPIOLIB is not enabled, provide linux gpio framework\n  compatibility by directly inlining the GPIO1/2 functions.  GPIO access\n  is limited to on-chip ones and they can be accessed as documented in\n  the datasheets (GPIO0-31 and 200-215).\n\n  If CONFIG_GPIOLIB is selected, two (2) gpio_chip-s, one for GPIO1 and\n  one for GPIO2, are registered.  GPIOs can still be accessed by using\n  the numberspace established in the databooks.\n\n  However this is not yet flexible enough for my uses:  My Alchemy\n  systems have a documented \"external\" gpio interface (fixed, different\n  numberspace) and can support a variety of baseboards, some of which\n  are equipped with I2C gpio expanders.  I want to be able to provide\n  the default 16 GPIOs of the CPU board numbered as 0..15 and also\n  support gpio expanders, if present, starting as gpio16.\n\n  To achieve this, a new Kconfig symbol for Alchemy is introduced,\n  CONFIG_ALCHEMY_GPIO_INDIRECT, which boards can enable to signal\n  that they don\u0027t want the Alchemy numberspace exposed to the outside\n  world, but instead want to provide their own.  Boards are now respon-\n  sible for providing the linux gpio interface glue code (either in a\n  custom gpio.h header (in board include directory) or with gpio_chips).\n\n  To make the board-specific inlined gpio functions work, the MIPS\n  Makefile must be changed so that the mach-au1x00/gpio.h header is\n  included _after_ the board headers, by moving the inclusion of\n  the mach-au1x00/ to the end of the header list.\n\n  See arch/mips/include/asm/mach-au1x00/gpio.h for more info.\n\nSigned-off-by: Manuel Lauss \u003cmanuel.lauss@gmail.com\u003e\nAcked-by: Florian Fainelli \u003cflorian@openwrt.org\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n",
  "tree_diff": [
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