msm: kgsl: disable gpummu pagefault interrupts when iommu is enabled
GPU MMU is used to control access to IOMMU registers on msm8960.
When pagefaults occurs, accessing mmu_pagefault which is NULL
causes kernel panic. Disable gpummu pagefault interrupts, since
pagefaults are handled through iommu fault handler.
CRs-Fixed: 380470
Change-Id: I9717f4af10b9722b0a14ba5995ee2293ae1de09f
Signed-off-by: Anoop Kumar Yerukala <ayeruk@codeaurora.org>
diff --git a/drivers/gpu/msm/adreno_a2xx.c b/drivers/gpu/msm/adreno_a2xx.c
index 86fe3f5..5ba3778 100644
--- a/drivers/gpu/msm/adreno_a2xx.c
+++ b/drivers/gpu/msm/adreno_a2xx.c
@@ -1822,7 +1822,8 @@
if (state) {
adreno_regwrite(device, REG_RBBM_INT_CNTL, RBBM_INT_MASK);
adreno_regwrite(device, REG_CP_INT_CNTL, CP_INT_MASK);
- adreno_regwrite(device, MH_INTERRUPT_MASK, KGSL_MMU_INT_MASK);
+ adreno_regwrite(device, MH_INTERRUPT_MASK,
+ kgsl_mmu_get_int_mask());
} else {
adreno_regwrite(device, REG_RBBM_INT_CNTL, 0);
adreno_regwrite(device, REG_CP_INT_CNTL, 0);