board: storage: enable SDIO wakeup from msm pin
If SDIO slot is using the dedicated MSM pins rather than GPIO
pins then SDIO wakeup interrupt configuration would require
calling msm_mpm_* APIs. For such slots, let's indicate this
by setting a "mpm_sdiowakeup_int" platform entry to appropriate
MPM interrupt number. SDCC will use this entry to call
msm_mpm_* APIs when required.
Change-Id: I8fbeb9bd54c68f0285427d5754444818b66e6e4f
Signed-off-by: Subhash Jadavani <subhashj@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-8064-storage.c b/arch/arm/mach-msm/board-8064-storage.c
index cd8fba5..275c893 100644
--- a/arch/arm/mach-msm/board-8064-storage.c
+++ b/arch/arm/mach-msm/board-8064-storage.c
@@ -196,6 +196,9 @@
},
};
+#define MSM_MPM_PIN_SDC1_DAT1 17
+#define MSM_MPM_PIN_SDC3_DAT1 21
+
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
static unsigned int sdc1_sup_clk_rates[] = {
400000, 24000000, 48000000, 96000000
@@ -215,6 +218,7 @@
.pin_data = &mmc_slot_pin_data[SDCC1],
.vreg_data = &mmc_slot_vreg_data[SDCC1],
.uhs_caps = MMC_CAP_1_8V_DDR | MMC_CAP_UHS_DDR50,
+ .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC1_DAT1,
};
static struct mmc_platform_data *apq8064_sdc1_pdata = &sdc1_data;
#else
@@ -244,6 +248,7 @@
.uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 |
MMC_CAP_UHS_SDR104 | MMC_CAP_MAX_CURRENT_800),
+ .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC3_DAT1,
};
static struct mmc_platform_data *apq8064_sdc3_pdata = &sdc3_data;
#else
diff --git a/arch/arm/mach-msm/board-8930-storage.c b/arch/arm/mach-msm/board-8930-storage.c
index 679c2fc..ecebfa9 100644
--- a/arch/arm/mach-msm/board-8930-storage.c
+++ b/arch/arm/mach-msm/board-8930-storage.c
@@ -207,6 +207,9 @@
},
};
+#define MSM_MPM_PIN_SDC1_DAT1 17
+#define MSM_MPM_PIN_SDC3_DAT1 21
+
static unsigned int sdc1_sup_clk_rates[] = {
400000, 24000000, 48000000,
};
@@ -230,7 +233,8 @@
.pclk_src_dfab = 1,
.nonremovable = 1,
.vreg_data = &mmc_slot_vreg_data[SDCC1],
- .pin_data = &mmc_slot_pin_data[SDCC1]
+ .pin_data = &mmc_slot_pin_data[SDCC1],
+ .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC1_DAT1,
};
#endif
@@ -268,6 +272,7 @@
.uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 |
MMC_CAP_UHS_SDR104 | MMC_CAP_MAX_CURRENT_800),
+ .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC3_DAT1,
};
#endif
diff --git a/arch/arm/mach-msm/board-8960-storage.c b/arch/arm/mach-msm/board-8960-storage.c
index 22f8fb5..cd53f83 100644
--- a/arch/arm/mach-msm/board-8960-storage.c
+++ b/arch/arm/mach-msm/board-8960-storage.c
@@ -206,6 +206,9 @@
},
};
+#define MSM_MPM_PIN_SDC1_DAT1 17
+#define MSM_MPM_PIN_SDC3_DAT1 21
+
static unsigned int sdc1_sup_clk_rates[] = {
400000, 24000000, 48000000
};
@@ -230,6 +233,7 @@
.nonremovable = 1,
.vreg_data = &mmc_slot_vreg_data[SDCC1],
.pin_data = &mmc_slot_pin_data[SDCC1],
+ .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC1_DAT1,
};
#endif
@@ -255,6 +259,7 @@
.uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
MMC_CAP_UHS_SDR50 | MMC_CAP_UHS_DDR50 |
MMC_CAP_UHS_SDR104 | MMC_CAP_MAX_CURRENT_600),
+ .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC3_DAT1,
};
#endif
diff --git a/arch/arm/mach-msm/board-9615-storage.c b/arch/arm/mach-msm/board-9615-storage.c
index c73e5a9..6bf7c69 100644
--- a/arch/arm/mach-msm/board-9615-storage.c
+++ b/arch/arm/mach-msm/board-9615-storage.c
@@ -163,6 +163,8 @@
#endif
};
+#define MSM_MPM_PIN_SDC1_DAT1 17
+
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
static unsigned int sdc1_sup_clk_rates[] = {
400000, 24000000, 48000000
@@ -183,7 +185,8 @@
#endif
.xpc_cap = 1,
.uhs_caps = (MMC_CAP_UHS_SDR12 | MMC_CAP_UHS_SDR25 |
- MMC_CAP_MAX_CURRENT_400)
+ MMC_CAP_MAX_CURRENT_400),
+ .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC1_DAT1,
};
static struct mmc_platform_data *msm9615_sdc1_pdata = &sdc1_data;
#else
diff --git a/arch/arm/mach-msm/board-msm8x60.c b/arch/arm/mach-msm/board-msm8x60.c
index 7832b878..da362a0 100644
--- a/arch/arm/mach-msm/board-msm8x60.c
+++ b/arch/arm/mach-msm/board-msm8x60.c
@@ -8368,6 +8368,7 @@
.msmsdcc_fmax = 48000000,
.nonremovable = 0,
.pclk_src_dfab = 1,
+ .mpm_sdiowakeup_int = MSM_MPM_PIN_SDC3_DAT1,
};
#endif