)]}'
{
  "commit": "5b0c0572fcd6204675c5f7ddfa572b5017f817dd",
  "tree": "1075a61338e887bd6d4ecd4517646ef95dc09fbc",
  "parents": [
    "ac29c11d4cd4fa1fac968e99998a956405732f2f"
  ],
  "author": {
    "name": "David S. Miller",
    "email": "davem@sunset.davemloft.net",
    "time": "Wed Feb 08 02:53:50 2006 -0800"
  },
  "committer": {
    "name": "David S. Miller",
    "email": "davem@sunset.davemloft.net",
    "time": "Mon Mar 20 01:12:01 2006 -0800"
  },
  "message": "[SPARC64]: Sun4v interrupt handling.\n\nSun4v has 4 interrupt queues: cpu, device, resumable errors,\nand non-resumable errors.  A set of head/tail offset pointers\nhelp maintain a work queue in physical memory.  The entries\nare 64-bytes in size.\n\nEach queue is allocated then registered with the hypervisor\nas we bring cpus up.\n\nThe two error queues each get a kernel side buffer that we\nuse to quickly empty the main interrupt queue before we\ncall up to C code to log the event and possibly take evasive\naction.\n\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n",
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