)]}'
{
  "commit": "61e183f8306934a9f66557f69f1f0f56f18dca06",
  "tree": "07f205fe60f4d5fe5a69a5406789e7510effd20f",
  "parents": [
    "e69664336d6400cc1685716ee5f04ef74e85703e"
  ],
  "author": {
    "name": "Viresh Kumar",
    "email": "viresh.kumar@st.com",
    "time": "Thu Nov 17 16:01:29 2011 +0530"
  },
  "committer": {
    "name": "Vinod Koul",
    "email": "vinod.koul@linux.intel.com",
    "time": "Mon Nov 28 08:48:02 2011 +0530"
  },
  "message": "dmaengine/dw_dmac: Reconfigure interrupt and chan_cfg register on resume\n\nIn S2R all DMA registers are reset by hardware and thus they are required to be\nreprogrammed. The channels which aren\u0027t reprogrammed are channel configuration\nand interrupt enable registers, which are currently programmed at chan_alloc\ntime.\n\nThis patch creates another routine to initialize a channel. It will try to\ninitialize channel on every dwc_dostart() call. If channel is already\ninitialised then it simply returns, otherwise it configures registers.\n\nThis routine will also initialize registers on wakeup from S2R, as we mark\nchannels as uninitialized on suspend.\n\nSigned-off-by: Viresh Kumar \u003cviresh.kumar@st.com\u003e\nSigned-off-by: Vinod Koul \u003cvinod.koul@linux.intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "decca1c3c83d728156f2d8de70a6329bcc09b441",
      "old_mode": 33188,
      "old_path": "drivers/dma/dw_dmac.c",
      "new_id": "9b592b02b5f49a3023cdc883322af7c451448a0a",
      "new_mode": 33188,
      "new_path": "drivers/dma/dw_dmac.c"
    },
    {
      "type": "modify",
      "old_id": "c3419518d701dbe3a0671cbc906a88c7ee3823a3",
      "old_mode": 33188,
      "old_path": "drivers/dma/dw_dmac_regs.h",
      "new_id": "5eef6946a36713bd7413ecd29c1751291c4cc41c",
      "new_mode": 33188,
      "new_path": "drivers/dma/dw_dmac_regs.h"
    }
  ]
}