power: pm8921-charger: get rid of using LPM
The LPM is causing a lot of regression on various test cases
1. Writes to charger have become complex
2. There is uncertainty about whether battery insertion/removal could be
detected reliably.
LPM was introduced to prevent lockups from happening when the charger
was running in hw based clock switching while it was suspended. UVLO
lockups were not seen if the charger was running from 19.2Mhz.
Instead activate LPM mode only while the system is suspended and always
force 19.2Mhz when not suspended. This way we avoid the complexities
with writes, can detect battery insertion/removal as long as the system
is not suspended and more importantly fix the UVLO issue since we will
never be running in hw clk switching mode.
Change-Id: I94510311b503c21ec659a96982010435abdbcfaf
Signed-off-by: Abhijeet Dharmapurikar <adharmap@codeaurora.org>
diff --git a/drivers/power/pm8921-charger.c b/drivers/power/pm8921-charger.c
index 0c8a483..5f50d31 100644
--- a/drivers/power/pm8921-charger.c
+++ b/drivers/power/pm8921-charger.c
@@ -255,12 +255,9 @@
struct dentry *dent;
struct bms_notify bms_notify;
int *usb_trim_table;
- struct regulator *vreg_xoadc;
bool ext_charging;
bool ext_charge_done;
bool iusb_fine_res;
- bool final_kickstart;
- bool lockup_lpm_wrkarnd;
DECLARE_BITMAP(enabled_irqs, PM_CHG_MAX_INTS);
struct work_struct battery_id_valid_work;
int64_t batt_id_min;
@@ -311,7 +308,6 @@
static struct pm8921_chg_chip *the_chip;
-static DEFINE_SPINLOCK(lpm_lock);
#define LPM_ENABLE_BIT BIT(2)
static int pm8921_chg_set_lpm(struct pm8921_chg_chip *chip, int enable)
{
@@ -340,66 +336,11 @@
static int pm_chg_write(struct pm8921_chg_chip *chip, u16 addr, u8 reg)
{
int rc;
- unsigned long flags = 0;
- u8 temp;
- /* Disable LPM */
- if (chip->lockup_lpm_wrkarnd) {
- spin_lock_irqsave(&lpm_lock, flags);
+ rc = pm8xxx_writeb(chip->dev->parent, addr, reg);
+ if (rc)
+ pr_err("failed: addr=%03X, rc=%d\n", addr, rc);
- /*
- * This delay is to prevent exit out of 32khz mode within
- * 200uS. It could be that chg was removed just few uS before
- * this gets called.
- */
- udelay(200);
- /* no clks */
- temp = 0xD1;
- rc = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (rc) {
- pr_err("Error %d writing %d to CHG_TEST\n", rc, temp);
- goto release_lpm_lock;
- }
-
- /* force 19.2Mhz before reading */
- temp = 0xD3;
- rc = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (rc) {
- pr_err("Error %d writing %d to CHG_TEST\n", rc, temp);
- goto release_lpm_lock;
- }
-
- rc = pm8xxx_writeb(chip->dev->parent, addr, reg);
- if (rc) {
- pr_err("failed: addr=%03X, rc=%d\n", addr, rc);
- goto release_lpm_lock;
- }
-
- /* no clks */
- temp = 0xD1;
- rc = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (rc) {
- pr_err("Error %d writing %d to CHG_TEST\n", rc, temp);
- goto release_lpm_lock;
- }
-
- /* switch to hw clk selection */
- temp = 0xD0;
- rc = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (rc) {
- pr_err("Error %d writing %d to CHG_TEST\n", rc, temp);
- goto release_lpm_lock;
- }
-
- udelay(200);
-
-release_lpm_lock:
- spin_unlock_irqrestore(&lpm_lock, flags);
- } else {
- rc = pm8xxx_writeb(chip->dev->parent, addr, reg);
- if (rc)
- pr_err("failed: addr=%03X, rc=%d\n", addr, rc);
- }
return rc;
}
@@ -430,23 +371,6 @@
chip->pmic_chg_irq[irq_id]);
}
-static int is_chg_on_bat(struct pm8921_chg_chip *chip)
-{
- return !(pm_chg_get_rt_status(chip, DCIN_VALID_IRQ)
- || pm_chg_get_rt_status(chip, USBIN_VALID_IRQ));
-}
-
-static void pm8921_chg_bypass_bat_gone_debounce(struct pm8921_chg_chip *chip,
- int bypass)
-{
- int rc;
-
- rc = pm_chg_write(chip, COMPARATOR_OVERRIDE, bypass ? 0x89 : 0x88);
- if (rc) {
- pr_err("Failed to set bypass bit to %d rc=%d\n", bypass, rc);
- }
-}
-
/* Treat OverVoltage/UnderVoltage as source missing */
static int is_usb_chg_plugged_in(struct pm8921_chg_chip *chip)
{
@@ -469,35 +393,8 @@
static int pm_chg_get_fsm_state(struct pm8921_chg_chip *chip)
{
u8 temp;
- unsigned long flags = 0;
int err = 0, ret = 0;
- if (chip->lockup_lpm_wrkarnd) {
- spin_lock_irqsave(&lpm_lock, flags);
-
- /*
- * This delay is to prevent exit out of 32khz mode within
- * 200uS. It could be that chg was removed just few uS before
- * this gets called.
- */
- udelay(200);
- /* no clks */
- temp = 0xD1;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to CHG_TEST\n", err, temp);
- goto err_out;
- }
-
- /* force 19.2Mhz before reading */
- temp = 0xD3;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to CHG_TEST\n", err, temp);
- goto err_out;
- }
- }
-
temp = CAPTURE_FSM_STATE_CMD;
err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
if (err) {
@@ -535,29 +432,7 @@
/* get the upper 1 bit */
ret |= (temp & 0x1) << 4;
- if (chip->lockup_lpm_wrkarnd) {
- /* no clks */
- temp = 0xD1;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to CHG_TEST\n", err, temp);
- goto err_out;
- }
-
- /* switch to hw clk selection */
- temp = 0xD0;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to CHG_TEST\n", err, temp);
- goto err_out;
- }
-
- udelay(200);
- }
-
err_out:
- if (chip->lockup_lpm_wrkarnd)
- spin_unlock_irqrestore(&lpm_lock, flags);
if (err)
return err;
@@ -568,35 +443,8 @@
static int pm_chg_get_regulation_loop(struct pm8921_chg_chip *chip)
{
u8 temp, data;
- unsigned long flags = 0;
int err = 0;
- if (chip->lockup_lpm_wrkarnd) {
- spin_lock_irqsave(&lpm_lock, flags);
-
- /*
- * This delay is to prevent exit out of 32khz mode within
- * 200uS. It could be that chg was removed just few uS before
- * this gets called.
- */
- udelay(200);
- /* no clks */
- temp = 0xD1;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to CHG_TEST\n", err, temp);
- goto err_out;
- }
-
- /* force 19.2Mhz before reading */
- temp = 0xD3;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to CHG_TEST\n", err, temp);
- goto err_out;
- }
- }
-
temp = READ_BANK_6;
err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
if (err) {
@@ -610,29 +458,7 @@
goto err_out;
}
- if (chip->lockup_lpm_wrkarnd) {
- /* no clks */
- temp = 0xD1;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to CHG_TEST\n", err, temp);
- goto err_out;
- }
-
- /* switch to hw clk selection */
- temp = 0xD0;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to CHG_TEST\n", err, temp);
- goto err_out;
- }
-
- udelay(200);
- }
-
err_out:
- if (chip->lockup_lpm_wrkarnd)
- spin_unlock_irqrestore(&lpm_lock, flags);
if (err)
return err;
@@ -2388,96 +2214,9 @@
return get_prop_batt_temp(the_chip);
}
-static int __pm8921_apply_19p2mhz_kickstart(struct pm8921_chg_chip *chip)
-{
- int err;
- u8 temp;
-
-
- temp = 0xD1;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
- return err;
- }
-
- temp = 0xD3;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
- return err;
- }
-
- temp = 0xD1;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
- return err;
- }
-
- temp = 0xD5;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
- return err;
- }
-
- /* Wait a few clock cycles before re-enabling hw clock switching */
- udelay(183);
-
- temp = 0xD1;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
- return err;
- }
-
- temp = 0xD0;
- err = pm8xxx_writeb(chip->dev->parent, CHG_TEST, temp);
- if (err) {
- pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
- return err;
- }
-
- /* Wait for few clock cycles before re-enabling LPM */
- udelay(32);
-
- return 0;
-}
-
-static int pm8921_apply_19p2mhz_kickstart(struct pm8921_chg_chip *chip)
-{
- int err;
- unsigned long flags = 0;
-
- spin_lock_irqsave(&lpm_lock, flags);
- err = pm8921_chg_set_lpm(chip, 0);
- if (err) {
- pr_err("Error settig LPM rc=%d\n", err);
- goto kick_err;
- }
-
- __pm8921_apply_19p2mhz_kickstart(chip);
-
-kick_err:
- err = pm8921_chg_set_lpm(chip, 1);
- if (err)
- pr_err("Error settig LPM rc=%d\n", err);
-
- spin_unlock_irqrestore(&lpm_lock, flags);
-
- return err;
-}
-
static void handle_usb_insertion_removal(struct pm8921_chg_chip *chip)
{
- int usb_present, rc = 0;
-
- if (chip->lockup_lpm_wrkarnd) {
- rc = pm8921_apply_19p2mhz_kickstart(chip);
- if (rc)
- pr_err("Failed to apply kickstart rc=%d\n", rc);
- }
+ int usb_present;
pm_chg_failed_clear(chip, 1);
usb_present = is_usb_chg_plugged_in(chip);
@@ -2487,11 +2226,6 @@
power_supply_changed(&chip->usb_psy);
power_supply_changed(&chip->batt_psy);
pm8921_bms_calibrate_hkadc();
-
- /* Enable/disable bypass if charger is on battery */
- if (chip->lockup_lpm_wrkarnd)
- pm8921_chg_bypass_bat_gone_debounce(chip,
- is_chg_on_bat(chip));
}
if (usb_present) {
schedule_delayed_work(&chip->unplug_check_work,
@@ -2507,10 +2241,6 @@
static void handle_stop_ext_chg(struct pm8921_chg_chip *chip)
{
- if (chip->lockup_lpm_wrkarnd)
- /* Enable bypass if charger is on battery */
- pm8921_chg_bypass_bat_gone_debounce(chip, is_chg_on_bat(chip));
-
if (!chip->ext_psy) {
pr_debug("external charger not registered.\n");
return;
@@ -2540,10 +2270,6 @@
unsigned long delay =
round_jiffies_relative(msecs_to_jiffies(EOC_CHECK_PERIOD_MS));
- /* Disable bypass if charger connected and not running on bat */
- if (chip->lockup_lpm_wrkarnd)
- pm8921_chg_bypass_bat_gone_debounce(chip, is_chg_on_bat(chip));
-
if (!chip->ext_psy) {
pr_debug("external charger not registered.\n");
return;
@@ -3025,28 +2751,12 @@
pm_chg_get_fsm_state(chip),
get_prop_batt_current(chip)
);
- if (chip->lockup_lpm_wrkarnd) {
- rc = pm8921_apply_19p2mhz_kickstart(chip);
- if (rc)
- pr_err("Failed kickstart rc=%d\n", rc);
-
- /*
- * Make sure kickstart happens at least 200 ms
- * after charger has been removed.
- */
- if (chip->final_kickstart) {
- chip->final_kickstart = false;
- goto check_again_later;
- }
- }
return;
} else {
goto check_again_later;
}
}
- chip->final_kickstart = true;
-
/* AICL only for usb wall charger */
if ((active_path & USB_ACTIVE_BIT) && usb_target_ma > 0 &&
!chip->disable_aicl) {
@@ -3339,11 +3049,6 @@
else
handle_stop_ext_chg(chip);
} else {
- if (chip->lockup_lpm_wrkarnd)
- /* if no external supply call bypass debounce here */
- pm8921_chg_bypass_bat_gone_debounce(chip,
- is_chg_on_bat(chip));
-
if (dc_present)
schedule_delayed_work(&chip->unplug_check_work,
msecs_to_jiffies(UNPLUG_CHECK_WAIT_PERIOD_MS));
@@ -4175,6 +3880,91 @@
return -EINVAL;
}
+static void pm8921_chg_force_19p2mhz_clk(struct pm8921_chg_chip *chip)
+{
+ int err;
+ u8 temp;
+
+ temp = 0xD1;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+
+ temp = 0xD3;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+
+ temp = 0xD1;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+
+ temp = 0xD5;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+
+ udelay(183);
+
+ temp = 0xD1;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+
+ temp = 0xD0;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+ udelay(32);
+
+ temp = 0xD1;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+
+ temp = 0xD3;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+}
+
+static void pm8921_chg_set_hw_clk_switching(struct pm8921_chg_chip *chip)
+{
+ int err;
+ u8 temp;
+
+ temp = 0xD1;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+
+ temp = 0xD0;
+ err = pm_chg_write(chip, CHG_TEST, temp);
+ if (err) {
+ pr_err("Error %d writing %d to addr %d\n", err, temp, CHG_TEST);
+ return;
+ }
+}
+
#define VREF_BATT_THERM_FORCE_ON BIT(7)
static void detect_battery_removal(struct pm8921_chg_chip *chip)
{
@@ -4206,15 +3996,8 @@
u8 subrev;
int rc, vdd_safe, fcc_uah, safety_time = DEFAULT_SAFETY_MINUTES;
- spin_lock_init(&lpm_lock);
-
- if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8921) {
- rc = __pm8921_apply_19p2mhz_kickstart(chip);
- if (rc) {
- pr_err("Failed to apply kickstart rc=%d\n", rc);
- return rc;
- }
- }
+ /* forcing 19p2mhz before accessing any charger registers */
+ pm8921_chg_force_19p2mhz_clk(chip);
detect_battery_removal(chip);
@@ -4462,45 +4245,6 @@
return rc;
}
- if (pm8xxx_get_version(chip->dev->parent) == PM8XXX_VERSION_8921) {
- /* Clear kickstart */
- rc = pm8xxx_writeb(chip->dev->parent, CHG_TEST, 0xD0);
- if (rc) {
- pr_err("Failed to clear kickstart rc=%d\n", rc);
- return rc;
- }
-
- /* From here the lpm_workaround will be active */
- chip->lockup_lpm_wrkarnd = true;
-
- /* Enable LPM */
- pm8921_chg_set_lpm(chip, 1);
- }
-
- if (chip->lockup_lpm_wrkarnd) {
- chip->vreg_xoadc = regulator_get(chip->dev, "vreg_xoadc");
- if (IS_ERR(chip->vreg_xoadc))
- return -ENODEV;
-
- rc = regulator_set_optimum_mode(chip->vreg_xoadc, 10000);
- if (rc < 0) {
- pr_err("Failed to set configure HPM rc=%d\n", rc);
- return rc;
- }
-
- rc = regulator_set_voltage(chip->vreg_xoadc, 1800000, 1800000);
- if (rc) {
- pr_err("Failed to set L14 voltage rc=%d\n", rc);
- return rc;
- }
-
- rc = regulator_enable(chip->vreg_xoadc);
- if (rc) {
- pr_err("Failed to enable L14 rc=%d\n", rc);
- return rc;
- }
- }
-
return 0;
}
@@ -4751,19 +4495,16 @@
int rc;
struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
- if (chip->lockup_lpm_wrkarnd) {
- rc = regulator_disable(chip->vreg_xoadc);
- if (rc)
- pr_err("Failed to disable L14 rc=%d\n", rc);
-
- rc = pm8921_apply_19p2mhz_kickstart(chip);
- if (rc)
- pr_err("Failed to apply kickstart rc=%d\n", rc);
- }
-
rc = pm_chg_masked_write(chip, CHG_CNTRL, VREF_BATT_THERM_FORCE_ON, 0);
if (rc)
pr_err("Failed to Force Vref therm off rc=%d\n", rc);
+
+ rc = pm8921_chg_set_lpm(chip, 1);
+ if (rc)
+ pr_err("Failed to set lpm rc=%d\n", rc);
+
+ pm8921_chg_set_hw_clk_switching(chip);
+
return 0;
}
@@ -4772,15 +4513,11 @@
int rc;
struct pm8921_chg_chip *chip = dev_get_drvdata(dev);
- if (chip->lockup_lpm_wrkarnd) {
- rc = regulator_enable(chip->vreg_xoadc);
- if (rc)
- pr_err("Failed to enable L14 rc=%d\n", rc);
+ pm8921_chg_force_19p2mhz_clk(chip);
- rc = pm8921_apply_19p2mhz_kickstart(chip);
- if (rc)
- pr_err("Failed to apply kickstart rc=%d\n", rc);
- }
+ rc = pm8921_chg_set_lpm(chip, 0);
+ if (rc)
+ pr_err("Failed to set lpm rc=%d\n", rc);
rc = pm_chg_masked_write(chip, CHG_CNTRL, VREF_BATT_THERM_FORCE_ON,
VREF_BATT_THERM_FORCE_ON);
@@ -5011,7 +4748,6 @@
{
struct pm8921_chg_chip *chip = platform_get_drvdata(pdev);
- regulator_put(chip->vreg_xoadc);
free_irqs(chip);
platform_set_drvdata(pdev, NULL);
the_chip = NULL;