[SPARC64]: Do not assume sun4v chips have load-twin/store-init support.
Check the cpu type in the OBP device tree before committing to
using the optimized Niagara memcpy and memset implementation.
If we don't recognize the cpu type, use a completely generic
version.
Signed-off-by: David S. Miller <davem@davemloft.net>
diff --git a/include/asm-sparc64/spitfire.h b/include/asm-sparc64/spitfire.h
index 23ad8a7..cf78078 100644
--- a/include/asm-sparc64/spitfire.h
+++ b/include/asm-sparc64/spitfire.h
@@ -38,6 +38,11 @@
#define L1DCACHE_SIZE 0x4000
+#define SUN4V_CHIP_INVALID 0x00
+#define SUN4V_CHIP_NIAGARA1 0x01
+#define SUN4V_CHIP_NIAGARA2 0x02
+#define SUN4V_CHIP_UNKNOWN 0xff
+
#ifndef __ASSEMBLY__
enum ultra_tlb_layout {
@@ -49,6 +54,8 @@
extern enum ultra_tlb_layout tlb_type;
+extern int sun4v_chip_type;
+
extern int cheetah_pcache_forced_on;
extern void cheetah_enable_pcache(void);