sh: SE7206 build fixes.
A number of API changes happened underneath the 7206 patches, update
for everything that broke.
Signed-off-by: Paul Mundt <lethal@linux-sh.org>
diff --git a/arch/sh/kernel/sys_sh.c b/arch/sh/kernel/sys_sh.c
index 8fde950..07f2b57 100644
--- a/arch/sh/kernel/sys_sh.c
+++ b/arch/sh/kernel/sys_sh.c
@@ -50,6 +50,7 @@
EXPORT_SYMBOL(shm_align_mask);
+#ifdef CONFIG_MMU
/*
* To avoid cache aliases, we map the shared page with same color.
*/
@@ -135,6 +136,7 @@
addr = COLOUR_ALIGN(addr, pgoff);
}
}
+#endif /* CONFIG_MMU */
static inline long
do_mmap2(unsigned long addr, unsigned long len, unsigned long prot,
diff --git a/arch/sh/kernel/timers/timer-cmt.c b/arch/sh/kernel/timers/timer-cmt.c
index 9eab395..3068738 100644
--- a/arch/sh/kernel/timers/timer-cmt.c
+++ b/arch/sh/kernel/timers/timer-cmt.c
@@ -96,8 +96,7 @@
return count;
}
-static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+static irqreturn_t cmt_timer_interrupt(int irq, void *dev_id)
{
unsigned long timer_status;
@@ -114,7 +113,7 @@
* locally disabled. -arca
*/
write_seqlock(&xtime_lock);
- handle_timer_tick(regs);
+ handle_timer_tick();
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
@@ -123,62 +122,10 @@
static struct irqaction cmt_irq = {
.name = "timer",
.handler = cmt_timer_interrupt,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
};
-/*
- * Hah! We'll see if this works (switching from usecs to nsecs).
- */
-static unsigned long cmt_timer_get_frequency(void)
-{
- u32 freq;
- struct timespec ts1, ts2;
- unsigned long diff_nsec;
- unsigned long factor;
-
- /* Setup the timer: We don't want to generate interrupts, just
- * have it count down at its natural rate.
- */
-
- ctrl_outw(ctrl_inw(CMT_CMSTR) & ~0x01, CMT_CMSTR);
- ctrl_outw(CMT_CMCSR_CALIB, CMT_CMCSR_0);
- ctrl_outw(0xffff, CMT_CMCOR_0);
- ctrl_outw(0xffff, CMT_CMCNT_0);
-
- rtc_sh_get_time(&ts2);
-
- do {
- rtc_sh_get_time(&ts1);
- } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
-
- /* actually start the timer */
- ctrl_outw(ctrl_inw(CMT_CMSTR) | 0x01, CMT_CMSTR);
-
- do {
- rtc_sh_get_time(&ts2);
- } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
-
- freq = 0xffff - ctrl_inw(CMT_CMCNT_0);
- if (ts2.tv_nsec < ts1.tv_nsec) {
- ts2.tv_nsec += 1000000000;
- ts2.tv_sec--;
- }
-
- diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec);
-
- /* this should work well if the RTC has a precision of n Hz, where
- * n is an integer. I don't think we have to worry about the other
- * cases. */
- factor = (1000000000 + diff_nsec/2) / diff_nsec;
-
- if (factor * diff_nsec > 1100000000 ||
- factor * diff_nsec < 900000000)
- panic("weird RTC (diff_nsec %ld)", diff_nsec);
-
- return freq * factor;
-}
-
static void cmt_clk_init(struct clk *clk)
{
u8 divisor = CMT_CMCSR_INIT & 0x3;
@@ -245,12 +192,12 @@
.init = cmt_timer_init,
.start = cmt_timer_start,
.stop = cmt_timer_stop,
- .get_frequency = cmt_timer_get_frequency,
+#ifndef CONFIG_GENERIC_TIME
.get_offset = cmt_timer_get_offset,
+#endif
};
struct sys_timer cmt_timer = {
.name = "cmt",
.ops = &cmt_timer_ops,
};
-
diff --git a/arch/sh/kernel/timers/timer-mtu2.c b/arch/sh/kernel/timers/timer-mtu2.c
index 73a5ef3..045b2ab 100644
--- a/arch/sh/kernel/timers/timer-mtu2.c
+++ b/arch/sh/kernel/timers/timer-mtu2.c
@@ -98,8 +98,7 @@
return count;
}
-static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id,
- struct pt_regs *regs)
+static irqreturn_t mtu2_timer_interrupt(int irq, void *dev_id)
{
unsigned long timer_status;
@@ -110,7 +109,7 @@
/* Do timer tick */
write_seqlock(&xtime_lock);
- handle_timer_tick(regs);
+ handle_timer_tick();
write_sequnlock(&xtime_lock);
return IRQ_HANDLED;
@@ -119,62 +118,10 @@
static struct irqaction mtu2_irq = {
.name = "timer",
.handler = mtu2_timer_interrupt,
- .flags = SA_INTERRUPT,
+ .flags = IRQF_DISABLED,
.mask = CPU_MASK_NONE,
};
-/*
- * Hah! We'll see if this works (switching from usecs to nsecs).
- */
-static unsigned long mtu2_timer_get_frequency(void)
-{
- u32 freq;
- struct timespec ts1, ts2;
- unsigned long diff_nsec;
- unsigned long factor;
-
- /* Setup the timer: We don't want to generate interrupts, just
- * have it count down at its natural rate.
- */
-
- ctrl_outb(ctrl_inb(MTU2_TSTR) & ~MTU2_TSTR_CST1, MTU2_TSTR);
- ctrl_outb(MTU2_TCR_CALIB, MTU2_TCR_1);
- ctrl_outb(ctrl_inb(MTU2_TIER_1) & ~MTU2_TIER_TGIEA, MTU2_TIER_1);
- ctrl_outw(0, MTU2_TCNT_1);
-
- rtc_get_time(&ts2);
-
- do {
- rtc_get_time(&ts1);
- } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
-
- /* actually start the timer */
- ctrl_outw(ctrl_inw(CMT_CMSTR) | 0x01, CMT_CMSTR);
-
- do {
- rtc_get_time(&ts2);
- } while (ts1.tv_nsec == ts2.tv_nsec && ts1.tv_sec == ts2.tv_sec);
-
- freq = ctrl_inw(MTU2_TCNT_0);
- if (ts2.tv_nsec < ts1.tv_nsec) {
- ts2.tv_nsec += 1000000000;
- ts2.tv_sec--;
- }
-
- diff_nsec = (ts2.tv_sec - ts1.tv_sec) * 1000000000 + (ts2.tv_nsec - ts1.tv_nsec);
-
- /* this should work well if the RTC has a precision of n Hz, where
- * n is an integer. I don't think we have to worry about the other
- * cases. */
- factor = (1000000000 + diff_nsec/2) / diff_nsec;
-
- if (factor * diff_nsec > 1100000000 ||
- factor * diff_nsec < 900000000)
- panic("weird RTC (diff_nsec %ld)", diff_nsec);
-
- return freq * factor;
-}
-
static unsigned int divisors[] = { 1, 4, 16, 64, 1, 1, 256 };
static void mtu2_clk_init(struct clk *clk)
@@ -250,8 +197,9 @@
.init = mtu2_timer_init,
.start = mtu2_timer_start,
.stop = mtu2_timer_stop,
- .get_frequency = mtu2_timer_get_frequency,
+#ifndef CONFIG_GENERIC_TIME
.get_offset = mtu2_timer_get_offset,
+#endif
};
struct sys_timer mtu2_timer = {
diff --git a/arch/sh/kernel/traps.c b/arch/sh/kernel/traps.c
index 1edec27..f558748 100644
--- a/arch/sh/kernel/traps.c
+++ b/arch/sh/kernel/traps.c
@@ -107,8 +107,6 @@
die(str, regs, err);
}
-static int handle_unaligned_notify_count = 10;
-
/*
* try and fix up kernelspace address errors
* - userspace errors just cause EFAULT to be returned, resulting in SEGV
@@ -347,6 +345,13 @@
#define SH_PC_8BIT_OFFSET(instr) ((((signed char)(instr))*2) + 4)
#define SH_PC_12BIT_OFFSET(instr) ((((signed short)(instr<<4))>>3) + 4)
+/*
+ * XXX: SH-2A needs this too, but it needs an overhaul thanks to mixed 32-bit
+ * opcodes..
+ */
+#ifndef CONFIG_CPU_SH2A
+static int handle_unaligned_notify_count = 10;
+
static int handle_unaligned_access(u16 instruction, struct pt_regs *regs)
{
u_int rm;
@@ -483,6 +488,7 @@
regs->pc += 2;
return ret;
}
+#endif /* CONFIG_CPU_SH2A */
#ifdef CONFIG_CPU_HAS_SR_RB
#define lookup_exception_vector(x) \
@@ -501,8 +507,10 @@
{
unsigned long error_code = 0;
mm_segment_t oldfs;
+#ifndef CONFIG_CPU_SH2A
u16 instruction;
int tmp;
+#endif
/* Intentional ifdef */
#ifdef CONFIG_CPU_HAS_SR_RB