msm: acpuclock-8064: Lower VDD_DIG voltage vote for L2 at 384MHz
New characterization data shows that vdd_dig voltage for L2@384MHz
can be lowered to 0.95v. Update the data in this patch.
Signed-off-by: Tianyi Gou <tgou@codeaurora.org>
(cherry picked from commit 7a904ecd4f43f228cd1b3ea0d8ef4054b69cdb35)
Change-Id: I7f38657930231ce8969bd16e793b57e606fcd162
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
diff --git a/arch/arm/mach-msm/acpuclock-8064.c b/arch/arm/mach-msm/acpuclock-8064.c
index 06c2579..4e4fabd 100644
--- a/arch/arm/mach-msm/acpuclock-8064.c
+++ b/arch/arm/mach-msm/acpuclock-8064.c
@@ -106,7 +106,7 @@
};
static struct l2_level l2_freq_tbl[] __initdata __initdata = {
- [0] = { { 384000, PLL_8, 0, 2, 0x00 }, 1050000, 1050000, 1 },
+ [0] = { { 384000, PLL_8, 0, 2, 0x00 }, 950000, 1050000, 1 },
[1] = { { 432000, HFPLL, 2, 0, 0x20 }, 1050000, 1050000, 2 },
[2] = { { 486000, HFPLL, 2, 0, 0x24 }, 1050000, 1050000, 2 },
[3] = { { 540000, HFPLL, 2, 0, 0x28 }, 1050000, 1050000, 2 },