msm: 9615: Add SDC2 platform data and GPIO information
Adding the platform data, gpio configuration and initialize
the SDC2 controller in PIO mode.
Signed-off-by: Krishna Konda <kkonda@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index d278969..e53334c 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -240,13 +240,108 @@
};
#endif
-struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
+#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
+static struct gpiomux_setting sdcc2_clk_actv_cfg = {
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_16MA,
+ .pull = GPIOMUX_PULL_NONE,
+};
+
+static struct gpiomux_setting sdcc2_cmd_data_0_3_actv_cfg = {
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_8MA,
+ .pull = GPIOMUX_PULL_UP,
+};
+
+static struct gpiomux_setting sdcc2_suspend_cfg = {
+ .func = GPIOMUX_FUNC_1,
+ .drv = GPIOMUX_DRV_2MA,
+ .pull = GPIOMUX_PULL_DOWN,
+};
+
+static struct msm_gpiomux_config msm9615_sdcc2_configs[] __initdata = {
+ {
+ /* SDC2_DATA_0 */
+ .gpio = 25,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
+ [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
+ },
+ },
+ {
+ /* SDC2_DATA_1 */
+ .gpio = 26,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
+ [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
+ },
+ },
+ {
+ /* SDC2_DATA_2 */
+ .gpio = 27,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
+ [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
+ },
+ },
+ {
+ /* SDC2_DATA_3 */
+ .gpio = 28,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
+ [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
+ },
+ },
+ {
+ /* SDC2_CMD GSBI1 */
+ .gpio = 29,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &sdcc2_cmd_data_0_3_actv_cfg,
+ [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
+ },
+ },
+ {
+ /* SDC2_CLK GSBI1 */
+ .gpio = 30,
+ .settings = {
+ [GPIOMUX_ACTIVE] = &sdcc2_clk_actv_cfg,
+ [GPIOMUX_SUSPENDED] = &sdcc2_suspend_cfg,
+ },
+ },
+};
+
+static struct msm_mmc_gpio sdc2_gpio_cfg[] = {
+ {25, "sdc2_dat_0"},
+ {26, "sdc2_dat_1"},
+ {27, "sdc2_dat_2"},
+ {28, "sdc2_dat_3"},
+ {29, "sdc2_cmd"},
+ {30, "sdc2_clk"},
+};
+
+static struct msm_mmc_gpio_data mmc_gpio_data[MAX_SDCC_CONTROLLER] = {
+ [SDCC2] = {
+ .gpio = sdc2_gpio_cfg,
+ .size = ARRAY_SIZE(sdc2_gpio_cfg),
+ },
+};
+#else
+static struct msm_gpiomux_config msm9615_sdcc2_configs[0];
+#endif
+
+static struct msm_mmc_pin_data mmc_slot_pin_data[MAX_SDCC_CONTROLLER] = {
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
[SDCC1] = {
.is_gpio = 0,
.pad_data = &mmc_pad_data[SDCC1],
},
#endif
+#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
+ [SDCC2] = {
+ .is_gpio = 1,
+ .gpio_data = &mmc_gpio_data[SDCC2],
+ },
+#endif
};
#ifdef CONFIG_MMC_MSM_SDC1_SUPPORT
@@ -267,6 +362,24 @@
static struct mmc_platform_data *msm9615_sdc1_pdata;
#endif
+#ifdef CONFIG_MMC_MSM_SDC2_SUPPORT
+static unsigned int sdc2_sup_clk_rates[] = {
+ 400000, 24000000, 48000000
+};
+
+static struct mmc_platform_data sdc2_data = {
+ .ocr_mask = MMC_VDD_27_28 | MMC_VDD_28_29,
+ .mmc_bus_width = MMC_CAP_4_BIT_DATA,
+ .sup_clk_table = sdc2_sup_clk_rates,
+ .sup_clk_cnt = ARRAY_SIZE(sdc2_sup_clk_rates),
+ .sdcc_v4_sup = true,
+ .pin_data = &mmc_slot_pin_data[SDCC2],
+};
+static struct mmc_platform_data *msm9615_sdc2_pdata = &sdc2_data;
+#else
+static struct mmc_platform_data *msm9615_sdc2_pdata;
+#endif
+
static void __init msm9615_init_mmc(void)
{
int ret;
@@ -289,6 +402,14 @@
}
}
}
+
+ if (msm9615_sdc2_pdata) {
+ msm_gpiomux_install(msm9615_sdcc2_configs,
+ ARRAY_SIZE(msm9615_sdcc2_configs));
+
+ /* SDC2: External card slot */
+ msm_add_sdcc(2, msm9615_sdc2_pdata);
+ }
}
#else
static void __init msm9615_init_mmc(void) { }
diff --git a/arch/arm/mach-msm/devices-9615.c b/arch/arm/mach-msm/devices-9615.c
index 3f662d1..c934558 100644
--- a/arch/arm/mach-msm/devices-9615.c
+++ b/arch/arm/mach-msm/devices-9615.c
@@ -256,6 +256,9 @@
#define MSM_SDC1_BASE 0x12180000
#define MSM_SDC1_DML_BASE (MSM_SDC1_BASE + 0x800)
#define MSM_SDC1_BAM_BASE (MSM_SDC1_BASE + 0x2000)
+#define MSM_SDC2_BASE 0x12140000
+#define MSM_SDC2_DML_BASE (MSM_SDC2_BASE + 0x800)
+#define MSM_SDC2_BAM_BASE (MSM_SDC2_BASE + 0x2000)
static struct resource resources_sdc1[] = {
{
@@ -292,6 +295,41 @@
#endif
};
+static struct resource resources_sdc2[] = {
+ {
+ .name = "core_mem",
+ .flags = IORESOURCE_MEM,
+ .start = MSM_SDC2_BASE,
+ .end = MSM_SDC2_DML_BASE - 1,
+ },
+ {
+ .name = "core_irq",
+ .flags = IORESOURCE_IRQ,
+ .start = SDC2_IRQ_0,
+ .end = SDC2_IRQ_0
+ },
+#ifdef CONFIG_MMC_MSM_SPS_SUPPORT
+ {
+ .name = "sdcc_dml_addr",
+ .start = MSM_SDC2_DML_BASE,
+ .end = MSM_SDC2_BAM_BASE - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "sdcc_bam_addr",
+ .start = MSM_SDC2_BAM_BASE,
+ .end = MSM_SDC2_BAM_BASE + (2 * SZ_4K) - 1,
+ .flags = IORESOURCE_MEM,
+ },
+ {
+ .name = "sdcc_bam_irq",
+ .start = SDC2_BAM_IRQ,
+ .end = SDC2_BAM_IRQ,
+ .flags = IORESOURCE_IRQ,
+ },
+#endif
+};
+
struct platform_device msm_device_sdc1 = {
.name = "msm_sdcc",
.id = 1,
@@ -302,8 +340,19 @@
},
};
+struct platform_device msm_device_sdc2 = {
+ .name = "msm_sdcc",
+ .id = 2,
+ .num_resources = ARRAY_SIZE(resources_sdc2),
+ .resource = resources_sdc2,
+ .dev = {
+ .coherent_dma_mask = 0xffffffff,
+ },
+};
+
static struct platform_device *msm_sdcc_devices[] __initdata = {
&msm_device_sdc1,
+ &msm_device_sdc2,
};
int __init msm_add_sdcc(unsigned int controller, struct mmc_platform_data *plat)