)]}'
{
  "commit": "76e677e25dd3d8af77d0b3810eacaacaf2f93f2f",
  "tree": "be96c432f97e0390d615acf0a162671705d6570e",
  "parents": [
    "c0758146adbe39514e75ac860ce7e49f865c2297"
  ],
  "author": {
    "name": "Bryan Sutula",
    "email": "Bryan.Sutula@hp.com",
    "time": "Wed Oct 05 11:02:06 2005 -0600"
  },
  "committer": {
    "name": "Tony Luck",
    "email": "tony.luck@intel.com",
    "time": "Thu Oct 06 15:04:11 2005 -0700"
  },
  "message": "[IA64] Avoid kernel hang during CMC interrupt storm\n\nI\u0027ve noticed a kernel hang during a storm of CMC interrupts, which was\ntracked down to the continual execution of the interrupt handler.\n\nThere\u0027s code in the CMC handler that\u0027s supposed to disable CMC\ninterrupts and switch to polling mode when it sees a bunch of CMCs.\nBecause disabling CMCs across all CPUs isn\u0027t safe in interrupt context,\nthe disable is done with a schedule_work().  But with continual CMC\ninterrupts, the schedule_work() never gets executed.\n\nThe following patch immediately disables CMC interrupts for the current\nCPU.  This then allows (at least) one CPU to ignore CMC interrupts,\nexecute the schedule_work() code, and disable CMC interrupts on the rest\nof the CPUs.\n\nAcked-by: Keith Owens \u003ckaos@sgi.com\u003e\nSigned-off-by: Bryan Sutula \u003cBryan.Sutula@hp.com\u003e\nSigned-off-by: Tony Luck \u003ctony.luck@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6dc726ad71372954b36c02b93949f240ac794ee4",
      "old_mode": 33188,
      "old_path": "arch/ia64/kernel/mca.c",
      "new_id": "d0a5106fba243f8364d2e8e0d86b844566db7a7c",
      "new_mode": 33188,
      "new_path": "arch/ia64/kernel/mca.c"
    }
  ]
}