msm: kgsl: Properly enable the A3XX GPU busy power counter
Fix a typo in the a3xx_reg.h file and set the correct bit
in the A3XX power counter register to enable the GPU busy
counter for pwrctrl monitoring.
Change-Id: Ic0dedbaddbda0769073f76fa532552620638c630
Signed-off-by: Jordan Crouse <jcrouse@codeaurora.org>
diff --git a/drivers/gpu/msm/a3xx_reg.h b/drivers/gpu/msm/a3xx_reg.h
index 970f377..4f5c783 100644
--- a/drivers/gpu/msm/a3xx_reg.h
+++ b/drivers/gpu/msm/a3xx_reg.h
@@ -249,7 +249,7 @@
/* Bit flags for RBBM_CTL */
#define RBBM_RBBM_CTL_RESET_PWR_CTR1 (1 << 1)
-#define RBBM_RBBM_CTL_ENABLE_PWR_CTR1 (17 << 1)
+#define RBBM_RBBM_CTL_ENABLE_PWR_CTR1 (1 << 17)
/* Various flags used by the context switch code */