| commit | 7bcf7717b6a047c272410d0cd00213185fe6b99d | [log] [tgz] |
|---|---|---|
| author | Ralf Baechle <ralf@linux-mips.org> | Thu Oct 11 23:46:09 2007 +0100 |
| committer | Ralf Baechle <ralf@linux-mips.org> | Thu Oct 11 23:46:09 2007 +0100 |
| tree | 81c5d6bbc2130815713e22bb5408ea80b6e1c499 | |
| parent | 91a2fcc88634663e9e13dcdfad0e4a860e64aeee [diff] [blame] |
[MIPS] Implement clockevents for R4000-style cp0 count/compare interrupt Signed-off-by: Ralf Baechle <ralf@linux-mips.org>
diff --git a/include/asm-mips/qemu.h b/include/asm-mips/qemu.h index 531caf4..487ced4 100644 --- a/include/asm-mips/qemu.h +++ b/include/asm-mips/qemu.h
@@ -12,7 +12,7 @@ * Interrupt numbers */ #define Q_PIC_IRQ_BASE 0 -#define Q_COUNT_COMPARE_IRQ 16 +#define Q_COUNT_COMPARE_IRQ 23 /* * Qemu clock rate. Unlike on real MIPS this has no relation to the