ppc32: use L1_CACHE_SHIFT/L1_CACHE_BYTES
instead of L1_CACHE_LINE_SIZE and LG_L1_CACHE_LINE_SIZE
Signed-off-by: Stephen Rothwell <sfr@canb.auug.org.au>
diff --git a/include/asm-ppc/cache.h b/include/asm-ppc/cache.h
index 38f2f1b..7a157d0 100644
--- a/include/asm-ppc/cache.h
+++ b/include/asm-ppc/cache.h
@@ -9,21 +9,18 @@
/* bytes per L1 cache line */
#if defined(CONFIG_8xx) || defined(CONFIG_403GCX)
-#define L1_CACHE_LINE_SIZE 16
-#define LG_L1_CACHE_LINE_SIZE 4
+#define L1_CACHE_SHIFT 4
#define MAX_COPY_PREFETCH 1
#elif defined(CONFIG_PPC64BRIDGE)
-#define L1_CACHE_LINE_SIZE 128
-#define LG_L1_CACHE_LINE_SIZE 7
+#define L1_CACHE_SHIFT 7
#define MAX_COPY_PREFETCH 1
#else
-#define L1_CACHE_LINE_SIZE 32
-#define LG_L1_CACHE_LINE_SIZE 5
+#define L1_CACHE_SHIFT 5
#define MAX_COPY_PREFETCH 4
#endif
-#define L1_CACHE_BYTES L1_CACHE_LINE_SIZE
-#define L1_CACHE_SHIFT LG_L1_CACHE_LINE_SIZE
+#define L1_CACHE_BYTES (1 << L1_CACHE_SHIFT)
+
#define SMP_CACHE_BYTES L1_CACHE_BYTES
#define L1_CACHE_SHIFT_MAX 7 /* largest L1 which this arch supports */