msm: acpuclock-8960ab: Support AVS in 8960ab
Add data for AVS in all PVS bins. Per experiment, this saves several
mA of current in graphics/video playback usecases.
Change-Id: Ifcee9c3f909da156771396df8aaba6baca9bcd98
Signed-off-by: Patrick Daly <pdaly@codeaurora.org>
(cherry picked from commit 2352b35293331485a78ee282f523bb4ff545030f)
diff --git a/arch/arm/mach-msm/acpuclock-8960ab.c b/arch/arm/mach-msm/acpuclock-8960ab.c
index 03a2004..7efc852 100644
--- a/arch/arm/mach-msm/acpuclock-8960ab.c
+++ b/arch/arm/mach-msm/acpuclock-8960ab.c
@@ -105,129 +105,131 @@
{ }
};
+#define AVS(x) .avsdscr_setting = (x)
+
static struct acpu_level freq_tbl_PVS0[] __initdata = {
- { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000 },
- { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 950000 },
- { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 975000 },
- { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 1000000 },
- { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 1025000 },
- { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1050000 },
- { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1075000 },
- { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1100000 },
- { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1125000 },
- { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1150000 },
- { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1175000 },
- { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1200000 },
- { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1225000 },
- { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1250000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 950000, AVS(0x70001F) },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 950000, AVS(0x0) },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 975000, AVS(0x0) },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 1000000, AVS(0x0) },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 1025000, AVS(0x0) },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1050000, AVS(0x0) },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1075000, AVS(0x0) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1100000, AVS(0x70000D) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1125000, AVS(0x0) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1150000, AVS(0x0) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1175000, AVS(0x0) },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1200000, AVS(0x0) },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1225000, AVS(0x0) },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1250000, AVS(0x70000B) },
{ 0, { 0 } }
};
static struct acpu_level freq_tbl_PVS1[] __initdata = {
- { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 925000 },
- { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 925000 },
- { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 950000 },
- { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 975000 },
- { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 1000000 },
- { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1025000 },
- { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1050000 },
- { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1075000 },
- { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1100000 },
- { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1125000 },
- { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1150000 },
- { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1175000 },
- { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1200000 },
- { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1225000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 925000, AVS(0x70001F) },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 925000, AVS(0x0) },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 950000, AVS(0x0) },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 975000, AVS(0x0) },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 1000000, AVS(0x0) },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1025000, AVS(0x0) },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1050000, AVS(0x0) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1075000, AVS(0x70000D) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1100000, AVS(0x0) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1125000, AVS(0x0) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1150000, AVS(0x0) },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1175000, AVS(0x0) },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1200000, AVS(0x0) },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1225000, AVS(0x70000B) },
{ 0, { 0 } }
};
static struct acpu_level freq_tbl_PVS2[] __initdata = {
- { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000 },
- { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 900000 },
- { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 925000 },
- { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 950000 },
- { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 975000 },
- { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1000000 },
- { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1025000 },
- { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1050000 },
- { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1075000 },
- { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1100000 },
- { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1125000 },
- { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1150000 },
- { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1175000 },
- { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1200000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000, AVS(0x70001F) },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 900000, AVS(0x0) },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 925000, AVS(0x0) },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 950000, AVS(0x0) },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 975000, AVS(0x0) },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 1000000, AVS(0x0) },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1025000, AVS(0x0) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1050000, AVS(0x70000D) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1075000, AVS(0x0) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1100000, AVS(0x0) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1125000, AVS(0x0) },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1150000, AVS(0x0) },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1175000, AVS(0x0) },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1200000, AVS(0x70000B) },
{ 0, { 0 } }
};
static struct acpu_level freq_tbl_PVS3[] __initdata = {
- { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000 },
- { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 900000 },
- { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 900000 },
- { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 925000 },
- { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 950000 },
- { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 975000 },
- { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1000000 },
- { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1025000 },
- { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1050000 },
- { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1075000 },
- { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1100000 },
- { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1125000 },
- { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1150000 },
- { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1175000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 900000, AVS(0x70001F) },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 900000, AVS(0x0) },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 900000, AVS(0x0) },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 925000, AVS(0x0) },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 950000, AVS(0x0) },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 975000, AVS(0x0) },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 1000000, AVS(0x0) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1025000, AVS(0x70000D) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1050000, AVS(0x0) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1075000, AVS(0x0) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1100000, AVS(0x0) },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1125000, AVS(0x0) },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1150000, AVS(0x0) },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1175000, AVS(0x70000B) },
{ 0, { 0 } }
};
static struct acpu_level freq_tbl_PVS4[] __initdata = {
- { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 875000 },
- { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 875000 },
- { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 875000 },
- { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 900000 },
- { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 925000 },
- { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 950000 },
- { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 975000 },
- { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1000000 },
- { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1025000 },
- { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1050000 },
- { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1075000 },
- { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1100000 },
- { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1125000 },
- { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1150000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 875000, AVS(0x70001F) },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 875000, AVS(0x0) },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 875000, AVS(0x0) },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 900000, AVS(0x0) },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 925000, AVS(0x0) },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 950000, AVS(0x0) },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 975000, AVS(0x0) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 1000000, AVS(0x70000D) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1025000, AVS(0x0) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1050000, AVS(0x0) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1075000, AVS(0x0) },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1100000, AVS(0x0) },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1125000, AVS(0x0) },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1150000, AVS(0x70000B) },
{ 0, { 0 } }
};
static struct acpu_level freq_tbl_PVS5[] __initdata = {
- { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 875000 },
- { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 875000 },
- { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 875000 },
- { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 875000 },
- { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 900000 },
- { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 925000 },
- { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 950000 },
- { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 975000 },
- { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1000000 },
- { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1025000 },
- { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1050000 },
- { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1075000 },
- { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1100000 },
- { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1125000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 875000, AVS(0x70001F) },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 875000, AVS(0x0) },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 875000, AVS(0x0) },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 875000, AVS(0x0) },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 900000, AVS(0x0) },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 925000, AVS(0x0) },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 950000, AVS(0x0) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 975000, AVS(0x70000D) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 1000000, AVS(0x0) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1025000, AVS(0x0) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1050000, AVS(0x0) },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1075000, AVS(0x0) },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1100000, AVS(0x0) },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1125000, AVS(0x70000B) },
{ 0, { 0 } }
};
static struct acpu_level freq_tbl_PVS6[] __initdata = {
- { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 850000 },
- { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 850000 },
- { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 850000 },
- { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 850000 },
- { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 875000 },
- { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 900000 },
- { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 925000 },
- { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 950000 },
- { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 975000 },
- { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1000000 },
- { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1025000 },
- { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1050000 },
- { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1075000 },
- { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1100000 },
+ { 1, { 384000, PLL_8, 0, 0x00 }, L2(0), 850000, AVS(0x70001F) },
+ { 1, { 486000, HFPLL, 2, 0x24 }, L2(3), 850000, AVS(0x0) },
+ { 1, { 594000, HFPLL, 1, 0x16 }, L2(3), 850000, AVS(0x0) },
+ { 1, { 702000, HFPLL, 1, 0x1A }, L2(3), 850000, AVS(0x0) },
+ { 1, { 810000, HFPLL, 1, 0x1E }, L2(3), 875000, AVS(0x0) },
+ { 1, { 918000, HFPLL, 1, 0x22 }, L2(3), 900000, AVS(0x0) },
+ { 1, { 1026000, HFPLL, 1, 0x26 }, L2(3), 925000, AVS(0x0) },
+ { 1, { 1134000, HFPLL, 1, 0x2A }, L2(9), 950000, AVS(0x70000D) },
+ { 1, { 1242000, HFPLL, 1, 0x2E }, L2(9), 975000, AVS(0x0) },
+ { 1, { 1350000, HFPLL, 1, 0x32 }, L2(9), 1000000, AVS(0x0) },
+ { 1, { 1458000, HFPLL, 1, 0x36 }, L2(9), 1025000, AVS(0x0) },
+ { 1, { 1566000, HFPLL, 1, 0x3A }, L2(9), 1050000, AVS(0x0) },
+ { 1, { 1674000, HFPLL, 1, 0x3E }, L2(9), 1075000, AVS(0x0) },
+ { 1, { 1728000, HFPLL, 1, 0x40 }, L2(9), 1100000, AVS(0x70000B) },
{ 0, { 0 } }
};