)]}'
{
  "commit": "82622284dd2f8791f9759f3cef601520a8bc63b2",
  "tree": "ee47f43af373d0c021cc83ff9e22925942e9d001",
  "parents": [
    "92078e0618f525e22945040b5daea21d4b6d4a16"
  ],
  "author": {
    "name": "David Daney",
    "email": "ddaney@caviumnetworks.com",
    "time": "Wed Oct 14 12:16:56 2009 -0700"
  },
  "committer": {
    "name": "Ralf Baechle",
    "email": "ralf@linux-mips.org",
    "time": "Thu Dec 17 01:57:01 2009 +0000"
  },
  "message": "MIPS: Put PGD in C0_CONTEXT for 64-bit R2 processors.\n\nProcessors that support the mips64r2 ISA can in four instructions\nconvert a shifted PGD pointer stored in the upper bits of c0_context\ninto a usable pointer.  By doing this we save a memory load and\nassociated potential cache miss in the TLB exception handlers.\n\nSince the upper bits of c0_context were holding the CPU number, we\nmove this to the upper bits of c0_xcontext which doesn\u0027t have enough\nbits to hold the PGD pointer, but has plenty for the CPU number.\n\nSigned-off-by: David Daney \u003cddaney@caviumnetworks.com\u003e\nSigned-off-by: Ralf Baechle \u003cralf@linux-mips.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "f6f3b990d83727ae0a47524cf89a923379b3a013",
      "old_mode": 33188,
      "old_path": "arch/mips/Kconfig",
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      "new_mode": 33188,
      "new_path": "arch/mips/Kconfig"
    },
    {
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      "old_id": "6083db586500ba14e22f94acab819f40e13a158f",
      "old_mode": 33188,
      "old_path": "arch/mips/include/asm/mmu_context.h",
      "new_id": "145bb81ccaa5094efec3806568f7fbb1087031f1",
      "new_mode": 33188,
      "new_path": "arch/mips/include/asm/mmu_context.h"
    },
    {
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      "old_mode": 33188,
      "old_path": "arch/mips/include/asm/stackframe.h",
      "new_id": "3b6da3330e321772358c9791914e3d472290d2f9",
      "new_mode": 33188,
      "new_path": "arch/mips/include/asm/stackframe.h"
    },
    {
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      "old_path": "arch/mips/mm/init.c",
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      "new_mode": 33188,
      "new_path": "arch/mips/mm/init.c"
    },
    {
      "type": "modify",
      "old_id": "bb1719a55d227dc595467aafd88173dc9507b937",
      "old_mode": 33188,
      "old_path": "arch/mips/mm/tlbex.c",
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      "new_mode": 33188,
      "new_path": "arch/mips/mm/tlbex.c"
    }
  ]
}