)]}'
{
  "commit": "8323444b5dba3fe55e56a95d20d8f55c1d6745af",
  "tree": "e2d657ff43c768d3b9f47642fa522cba1c3ffcd8",
  "parents": [
    "28df82ebab79c6a2b4295dd94fd8de88196a49df"
  ],
  "author": {
    "name": "venkatesh.pallipadi@intel.com",
    "email": "venkatesh.pallipadi@intel.com",
    "time": "Wed Aug 20 16:45:53 2008 -0700"
  },
  "committer": {
    "name": "Ingo Molnar",
    "email": "mingo@elte.hu",
    "time": "Thu Aug 21 13:27:34 2008 +0200"
  },
  "message": "x86: PAT Update validate_pat_support for intel CPUs\n\nPentium III and Core Solo/Duo CPUs have an erratum\n\" Page with PAT set to WC while associated MTRR is UC may consolidate to UC \"\nwhich can result in WC setting in PAT to be ineffective. We will disable\nPAT on such CPUs, so that we can continue to use MTRR WC setting.\n\nSigned-off-by: Venkatesh Pallipadi \u003cvenkatesh.pallipadi@intel.com\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "84a8220a6072c0425b9da95fbb28b5a309cbfda1",
      "old_mode": 33188,
      "old_path": "arch/x86/kernel/cpu/addon_cpuid_features.c",
      "new_id": "a6ef672adbbae01e8da2abb5bf2ae1cb32c091be",
      "new_mode": 33188,
      "new_path": "arch/x86/kernel/cpu/addon_cpuid_features.c"
    }
  ]
}