iwlegacy: rename il_{read,write}32 to _il_{rd,wr}

Introduce rule that underscore at the beginning mean unlocked I/O method.

Signed-off-by: Stanislaw Gruszka <sgruszka@redhat.com>
diff --git a/drivers/net/wireless/iwlegacy/iwl3945-base.c b/drivers/net/wireless/iwlegacy/iwl3945-base.c
index 66aa850..def3140 100644
--- a/drivers/net/wireless/iwlegacy/iwl3945-base.c
+++ b/drivers/net/wireless/iwlegacy/iwl3945-base.c
@@ -824,7 +824,7 @@
 			  (flags & HW_CARD_DISABLED) ? "Kill" : "On",
 			  (flags & SW_CARD_DISABLED) ? "Kill" : "On");
 
-	il_write32(il, CSR_UCODE_DRV_GP1_SET,
+	_il_wr(il, CSR_UCODE_DRV_GP1_SET,
 		    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 
 	if (flags & HW_CARD_DISABLED)
@@ -1419,19 +1419,19 @@
 	/* Ack/clear/reset pending uCode interrupts.
 	 * Note:  Some bits in CSR_INT are "OR" of bits in CSR_FH_INT_STATUS,
 	 *  and will clear only when CSR_FH_INT_STATUS gets cleared. */
-	inta = il_read32(il, CSR_INT);
-	il_write32(il, CSR_INT, inta);
+	inta = _il_rd(il, CSR_INT);
+	_il_wr(il, CSR_INT, inta);
 
 	/* Ack/clear/reset pending flow-handler (DMA) interrupts.
 	 * Any new interrupts that happen after this, either while we're
 	 * in this tasklet, or later, will show up in next ISR/tasklet. */
-	inta_fh = il_read32(il, CSR_FH_INT_STATUS);
-	il_write32(il, CSR_FH_INT_STATUS, inta_fh);
+	inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
+	_il_wr(il, CSR_FH_INT_STATUS, inta_fh);
 
 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 	if (il_get_debug_level(il) & IL_DL_ISR) {
 		/* just for debug */
-		inta_mask = il_read32(il, CSR_INT_MASK);
+		inta_mask = _il_rd(il, CSR_INT_MASK);
 		D_ISR("inta 0x%08x, enabled 0x%08x, fh 0x%08x\n",
 			      inta, inta_mask, inta_fh);
 	}
@@ -1519,7 +1519,7 @@
 		D_ISR("Tx interrupt\n");
 		il->isr_stats.tx++;
 
-		il_write32(il, CSR_FH_INT_STATUS, (1 << 6));
+		_il_wr(il, CSR_FH_INT_STATUS, (1 << 6));
 		il_write_direct32(il, FH39_TCSR_CREDIT
 					(FH39_SRVC_CHNL), 0x0);
 		handled |= CSR_INT_BIT_FH_TX;
@@ -1543,9 +1543,9 @@
 
 #ifdef CONFIG_IWLWIFI_LEGACY_DEBUG
 	if (il_get_debug_level(il) & (IL_DL_ISR)) {
-		inta = il_read32(il, CSR_INT);
-		inta_mask = il_read32(il, CSR_INT_MASK);
-		inta_fh = il_read32(il, CSR_FH_INT_STATUS);
+		inta = _il_rd(il, CSR_INT);
+		inta_mask = _il_rd(il, CSR_INT_MASK);
+		inta_fh = _il_rd(il, CSR_FH_INT_STATUS);
 		D_ISR("End inta 0x%08x, enabled 0x%08x, fh 0x%08x, "
 			"flags 0x%08lx\n", inta, inta_mask, inta_fh, flags);
 	}
@@ -1817,7 +1817,7 @@
 static void il3945_nic_start(struct il_priv *il)
 {
 	/* Remove all resets to allow NIC to operate */
-	il_write32(il, CSR_RESET, 0);
+	_il_wr(il, CSR_RESET, 0);
 }
 
 #define IWL3945_UCODE_GET(item)						\
@@ -2304,7 +2304,7 @@
 		clear_bit(STATUS_EXIT_PENDING, &il->status);
 
 	/* stop and reset the on-board processor */
-	il_write32(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
+	_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
 
 	/* tell the device to stop sending interrupts */
 	spin_lock_irqsave(&il->lock, flags);
@@ -2412,7 +2412,7 @@
 	}
 
 	/* If platform's RF_KILL switch is NOT set to KILL */
-	if (il_read32(il, CSR_GP_CNTRL) &
+	if (_il_rd(il, CSR_GP_CNTRL) &
 				CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW)
 		clear_bit(STATUS_RF_KILL_HW, &il->status);
 	else {
@@ -2421,7 +2421,7 @@
 		return -ENODEV;
 	}
 
-	il_write32(il, CSR_INT, 0xFFFFFFFF);
+	_il_wr(il, CSR_INT, 0xFFFFFFFF);
 
 	rc = il3945_hw_nic_init(il);
 	if (rc) {
@@ -2430,17 +2430,17 @@
 	}
 
 	/* make sure rfkill handshake bits are cleared */
-	il_write32(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
-	il_write32(il, CSR_UCODE_DRV_GP1_CLR,
+	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
+	_il_wr(il, CSR_UCODE_DRV_GP1_CLR,
 		    CSR_UCODE_DRV_GP1_BIT_CMD_BLOCKED);
 
 	/* clear (again), then enable host interrupts */
-	il_write32(il, CSR_INT, 0xFFFFFFFF);
+	_il_wr(il, CSR_INT, 0xFFFFFFFF);
 	il_enable_interrupts(il);
 
 	/* really make sure rfkill handshake bits are cleared */
-	il_write32(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
-	il_write32(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
+	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
+	_il_wr(il, CSR_UCODE_DRV_GP1_CLR, CSR_UCODE_SW_BIT_RFKILL);
 
 	/* Copy original ucode data image from disk into backup cache.
 	 * This will be used to initialize the on-board processor's
@@ -2529,7 +2529,7 @@
 	struct il_priv *il =
 	    container_of(data, struct il_priv, _3945.rfkill_poll.work);
 	bool old_rfkill = test_bit(STATUS_RF_KILL_HW, &il->status);
-	bool new_rfkill = !(il_read32(il, CSR_GP_CNTRL)
+	bool new_rfkill = !(_il_rd(il, CSR_GP_CNTRL)
 			& CSR_GP_CNTRL_REG_FLAG_HW_RF_KILL_SW);
 
 	if (new_rfkill != old_rfkill) {
@@ -3748,7 +3748,7 @@
 	 * strange state ... like being left stranded by a primary kernel
 	 * and this is now the kdump kernel trying to start up
 	 */
-	il_write32(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
+	_il_wr(il, CSR_RESET, CSR_RESET_REG_FLAG_NEVO_RESET);
 
 	/***********************
 	 * 4. Read EEPROM