)]}'
{
  "commit": "84f2b9b2edc09595569c7397cc3c888764ffd78b",
  "tree": "f959f7f5746b3dc8409b2aae9584101c9b2f71a1",
  "parents": [
    "6c073a7ee250118b8be3a2379c96fd7f78382b06"
  ],
  "author": {
    "name": "Stephane Eranian",
    "email": "eranian@google.com",
    "time": "Thu Feb 02 12:04:01 2012 +0100"
  },
  "committer": {
    "name": "Ingo Molnar",
    "email": "mingo@elte.hu",
    "time": "Fri Feb 03 08:24:40 2012 +0100"
  },
  "message": "perf: Remove deprecated WARN_ON_ONCE()\n\nWith the new throttling/unthrottling code introduced with\ncommit:\n\n  e050e3f0a71b (\"perf: Fix broken interrupt rate throttling\")\n\nwe occasionally hit two WARN_ON_ONCE() checks in:\n\n  - intel_pmu_pebs_enable()\n  - intel_pmu_lbr_enable()\n  - x86_pmu_start()\n\nThe assertions are no longer problematic. There is a valid\npath where they can trigger but it is harmless.\n\nThe assertion can be triggered with:\n\n  $ perf record -e instructions:pp ....\n\nLeading to paths:\n\n  intel_pmu_pebs_enable\n  intel_pmu_enable_event\n  x86_perf_event_set_period\n  x86_pmu_start\n  perf_adjust_freq_unthr_context\n  perf_event_task_tick\n  scheduler_tick\n\nAnd:\n\n  intel_pmu_lbr_enable\n  intel_pmu_enable_event\n  x86_perf_event_set_period\n  x86_pmu_start\n  perf_adjust_freq_unthr_context.\n  perf_event_task_tick\n  scheduler_tick\n\ncpuc-\u003eenabled is always on because when we get to\nperf_adjust_freq_unthr_context() the PMU is not totally\ndisabled. Furthermore when we need to adjust a period,\nwe only stop the event we need to change and not the\nentire PMU. Thus, when we re-enable, cpuc-\u003eenabled is\nalready set. Note that when we stop the event, both\npebs and lbr are stopped if necessary (and possible).\n\nSigned-off-by: Stephane Eranian \u003ceranian@google.com\u003e\nCc: peterz@infradead.org\nLink: http://lkml.kernel.org/r/20120202110401.GA30911@quad\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "5adce1040b118c597daf067e675896eb2100f808",
      "old_mode": 33188,
      "old_path": "arch/x86/kernel/cpu/perf_event.c",
      "new_id": "2a30e5ae6acf2cdabf102ca1c63a367b207a8d2a",
      "new_mode": 33188,
      "new_path": "arch/x86/kernel/cpu/perf_event.c"
    },
    {
      "type": "modify",
      "old_id": "73da6b64f5b788ccbb83eef3317c32161b755fca",
      "old_mode": 33188,
      "old_path": "arch/x86/kernel/cpu/perf_event_intel_ds.c",
      "new_id": "d6bd49faa40cf2becce23b0b0807219178588fde",
      "new_mode": 33188,
      "new_path": "arch/x86/kernel/cpu/perf_event_intel_ds.c"
    },
    {
      "type": "modify",
      "old_id": "3fab3de3ce96dde8b3bece9bdf65cae8c5b1e466",
      "old_mode": 33188,
      "old_path": "arch/x86/kernel/cpu/perf_event_intel_lbr.c",
      "new_id": "47a7e63bfe54d4ec466911e75a901fe45ef09eeb",
      "new_mode": 33188,
      "new_path": "arch/x86/kernel/cpu/perf_event_intel_lbr.c"
    }
  ]
}