msm: clock-local: Cleanup RCG clock dummy_freq and ops names
Rename 'soc_clk_ops_xxxx' to 'clk_ops_rcg_xxxx' and
'local_dummy_freq' to 'rcg_dummy_freq' to better match naming
conventions used elsewhere in these drivers.
Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-7x30.c b/arch/arm/mach-msm/clock-7x30.c
index 3793ba0..0fda790 100644
--- a/arch/arm/mach-msm/clock-7x30.c
+++ b/arch/arm/mach-msm/clock-7x30.c
@@ -165,7 +165,7 @@
.sys_vdd = v, \
}
-static struct clk_ops soc_clk_ops_7x30;
+static struct clk_ops clk_ops_rcg_7x30;
#define PCOM_XO_DISABLE 0
#define PCOM_XO_ENABLE 1
@@ -303,11 +303,11 @@
},
.freq_tbl = clk_tbl_axi,
.set_rate = set_rate_nop,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_nop,
.c = {
.dbg_name = "glbl_root_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(glbl_root_clk.c),
},
};
@@ -968,11 +968,11 @@
.ns_mask = F_MASK_MND8(24, 17),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_csi,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "csi0_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(csi0_clk.c),
},
};
@@ -993,10 +993,10 @@
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_tcxo,
.root_en_mask = BIT(11),
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "i2c_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(i2c_clk.c),
},
};
@@ -1012,10 +1012,10 @@
.root_en_mask = BIT(2),
.freq_tbl = clk_tbl_tcxo,
.set_rate = set_rate_nop,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "i2c_2_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(i2c_2_clk.c),
},
};
@@ -1031,10 +1031,10 @@
.root_en_mask = BIT(2),
.freq_tbl = clk_tbl_tcxo,
.set_rate = set_rate_nop,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "qup_i2c_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(qup_i2c_clk.c),
},
};
@@ -1050,10 +1050,10 @@
.root_en_mask = BIT(4),
.freq_tbl = clk_tbl_tcxo,
.set_rate = set_rate_nop,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "uart1_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(uart1_clk.c),
},
};
@@ -1069,10 +1069,10 @@
.root_en_mask = BIT(4),
.freq_tbl = clk_tbl_tcxo,
.set_rate = set_rate_nop,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "uart2_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(uart2_clk.c),
},
};
@@ -1106,11 +1106,11 @@
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_uartdm,
.ns_mask = F_MASK_MND16,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "uart1dm_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(uart1dm_clk.c),
},
};
@@ -1129,10 +1129,10 @@
.freq_tbl = clk_tbl_uartdm,
.ns_mask = F_MASK_MND16,
.set_rate = set_rate_mnd,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "uart2dm_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(uart2dm_clk.c),
},
};
@@ -1161,11 +1161,11 @@
.ns_mask = F_MASK_BASIC,
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_mdh,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "emdh_clk",
.flags = CLKFLAG_MIN | CLKFLAG_MAX,
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(emdh_clk.c),
.depends = &axi_li_adsp_a_clk.c,
},
@@ -1182,11 +1182,11 @@
.ns_mask = F_MASK_BASIC,
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_mdh,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "pmdh_clk",
.flags = CLKFLAG_MIN | CLKFLAG_MAX,
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(pmdh_clk.c),
.depends = &axi_li_adsp_a_clk.c,
},
@@ -1227,10 +1227,10 @@
.ns_mask = F_MASK_BASIC | (7 << 12),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_grp,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "grp_2d_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(grp_2d_clk.c),
.depends = &axi_grp_2d_clk.c,
},
@@ -1246,10 +1246,10 @@
.ns_mask = F_MASK_BASIC | (7 << 12),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_grp,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "grp_3d_src_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(grp_3d_src_clk.c),
.depends = &axi_li_grp_clk.c,
},
@@ -1312,11 +1312,11 @@
.ns_mask = F_MASK_MND8(19, 12),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_sdc1_3,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "sdc1_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(sdc1_clk.c),
},
};
@@ -1334,11 +1334,11 @@
.ns_mask = F_MASK_MND8(19, 12),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_sdc1_3,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "sdc3_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(sdc3_clk.c),
},
};
@@ -1368,11 +1368,11 @@
.ns_mask = F_MASK_MND8(20, 13),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_sdc2_4,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "sdc2_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(sdc2_clk.c),
},
};
@@ -1390,11 +1390,11 @@
.ns_mask = F_MASK_MND8(20, 13),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_sdc2_4,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "sdc4_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(sdc4_clk.c),
},
};
@@ -1425,10 +1425,10 @@
.ns_mask = F_MASK_BASIC,
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_mdp_core,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mdp_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(mdp_clk.c),
.depends = &axi_mdp_clk.c,
},
@@ -1458,10 +1458,10 @@
.ns_mask = F_MASK_MND16,
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_mdp_lcdc,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mdp_lcdc_pclk_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(mdp_lcdc_pclk_clk.c),
},
};
@@ -1500,10 +1500,10 @@
.ns_mask = BM(3, 2),
.freq_tbl = clk_tbl_mdp_vsync,
.set_rate = set_rate_nop,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mdp_vsync_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(mdp_vsync_clk.c),
},
};
@@ -1529,10 +1529,10 @@
.ns_mask = F_MASK_MND16,
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_mi2s_codec,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mi2s_codec_rx_m_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(mi2s_codec_rx_m_clk.c),
},
};
@@ -1567,10 +1567,10 @@
.ns_mask = F_MASK_MND16,
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_mi2s_codec,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mi2s_codec_tx_m_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(mi2s_codec_tx_m_clk.c),
},
};
@@ -1611,10 +1611,10 @@
.ns_mask = F_MASK_MND16,
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_mi2s,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mi2s_m_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(mi2s_m_clk.c),
},
};
@@ -1653,11 +1653,11 @@
.ns_mask = F_MASK_MND8(19, 12),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_midi,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "midi_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(midi_clk.c),
},
};
@@ -1699,10 +1699,10 @@
.freq_tbl = clk_tbl_sdac,
.ns_mask = F_MASK_MND16,
.set_rate = set_rate_mnd,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "sdac_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(sdac_clk.c),
},
};
@@ -1740,11 +1740,11 @@
.ns_mask = F_MASK_MND8(23, 16),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_tv,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "tv_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(tv_clk.c),
},
};
@@ -1830,11 +1830,11 @@
.ns_mask = F_MASK_MND8(23, 16),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_usb,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "usb_hs_src_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(usb_hs_src_clk.c),
.depends = &axi_li_adsp_a_clk.c,
},
@@ -1966,10 +1966,10 @@
.freq_tbl = clk_tbl_vfe_jpeg,
.ns_mask = F_MASK_MND16,
.set_rate = set_rate_mnd,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "jpeg_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(jpeg_clk.c),
.depends = &axi_li_jpeg_clk.c,
},
@@ -1989,10 +1989,10 @@
.freq_tbl = clk_tbl_vfe_jpeg,
.ns_mask = F_MASK_MND16,
.set_rate = set_rate_mnd,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "vfe_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(vfe_clk.c),
.depends = &axi_li_vfe_clk.c,
},
@@ -2072,10 +2072,10 @@
.freq_tbl = clk_tbl_cam,
.ns_mask = F_MASK_MND16,
.set_rate = set_rate_mnd,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "cam_m_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(cam_m_clk.c),
},
};
@@ -2104,11 +2104,11 @@
.ns_mask = F_MASK_MND8(22, 15),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_vpe,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "vpe_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(vpe_clk.c),
.depends = &axi_vpe_clk.c,
},
@@ -2140,11 +2140,11 @@
.ns_mask = F_MASK_MND8(24, 17),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_mfc,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "mfc_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(mfc_clk.c),
.depends = &axi_mfc_clk.c,
},
@@ -2186,11 +2186,11 @@
.ns_mask = F_MASK_MND8(19, 12),
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_spi,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_mnd,
.c = {
.dbg_name = "spi_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(spi_clk.c),
},
};
@@ -2215,10 +2215,10 @@
.ns_mask = BM(1, 0),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_lpa_codec,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "lpa_codec_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(lpa_codec_clk.c),
},
};
@@ -2239,11 +2239,11 @@
.ns_reg = MDC_NS_REG,
.root_en_mask = BIT(11),
.freq_tbl = clk_tbl_mdc,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.set_rate = set_rate_nop,
.c = {
.dbg_name = "mdc_clk",
- .ops = &soc_clk_ops_7x30,
+ .ops = &clk_ops_rcg_7x30,
CLK_INIT(mdc_clk.c),
},
};
@@ -2968,7 +2968,7 @@
/*
* Clock operation handler registration
*/
-static struct clk_ops soc_clk_ops_7x30 = {
+static struct clk_ops clk_ops_rcg_7x30 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
.auto_off = rcg_clk_auto_off,
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 60bd42d..a3f1d77 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -431,7 +431,7 @@
return branch_reset(&to_rcg_clk(clk)->b, action);
}
-static struct clk_ops soc_clk_ops_8960 = {
+static struct clk_ops clk_ops_rcg_8960 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
.auto_off = rcg_clk_auto_off,
@@ -986,10 +986,10 @@
.ns_mask = (BM(31, 16) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_gsbi_uart, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8960, \
+ .ops = &clk_ops_rcg_8960, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -1050,10 +1050,10 @@
.ns_mask = (BM(23, 16) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_gsbi_qup, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8960, \
+ .ops = &clk_ops_rcg_8960, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -1120,10 +1120,10 @@
.ns_mask = BM(1, 0),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_pdm,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "pdm_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(pdm_clk.c),
},
};
@@ -1163,10 +1163,10 @@
},
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_prng,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "prng_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(prng_clk.c),
},
};
@@ -1187,10 +1187,10 @@
.ns_mask = (BM(23, 16) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = f_table, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #name, \
- .ops = &soc_clk_ops_8960, \
+ .ops = &clk_ops_rcg_8960, \
CLK_INIT(name.c), \
}, \
}
@@ -1281,10 +1281,10 @@
.ns_mask = (BM(31, 16) | BM(6, 0)),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_tsif_ref,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "tsif_ref_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(tsif_ref_clk.c),
},
};
@@ -1313,10 +1313,10 @@
.ns_mask = BM(1, 0),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_tssc,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "tssc_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(tssc_clk.c),
},
};
@@ -1351,10 +1351,10 @@
.ns_mask = (BM(23, 16) | BM(6, 0)),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_usb,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "usb_hs1_xcvr_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(usb_hs1_xcvr_clk.c),
},
};
@@ -1383,10 +1383,10 @@
.ns_mask = (BM(23, 16) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_usb, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8960, \
+ .ops = &clk_ops_rcg_8960, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -1919,10 +1919,10 @@
.ctl_mask = BM(7, 6), \
.set_rate = set_rate_mnd_8, \
.freq_tbl = clk_tbl_cam, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8960, \
+ .ops = &clk_ops_rcg_8960, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -1984,10 +1984,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_csi,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "csi0_src_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(csi0_src_clk.c),
},
};
@@ -2038,10 +2038,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_csi,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "csi1_src_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(csi1_src_clk.c),
},
};
@@ -2116,10 +2116,10 @@
.ns_mask = BIT(25),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_csi_pix,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "csi_pix_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(csi_pix_clk.c),
},
};
@@ -2136,10 +2136,10 @@
.ns_mask = BIT(12),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_csi_rdi,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "csi_rdi_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(csi_rdi_clk.c),
},
};
@@ -2173,10 +2173,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd_8,
.freq_tbl = clk_tbl_csi_phytimer,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "csiphy_timer_src_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(csiphy_timer_src_clk.c),
},
};
@@ -2243,10 +2243,10 @@
.ns_mask = BM(15, 12),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_dsi_byte,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "dsi1_byte_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(dsi1_byte_clk.c),
},
};
@@ -2265,10 +2265,10 @@
.ns_mask = BM(15, 12),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_dsi_byte,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "dsi2_byte_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(dsi2_byte_clk.c),
},
};
@@ -2286,10 +2286,10 @@
.ns_mask = BM(15, 12),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_dsi_byte,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "dsi1_esc_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(dsi1_esc_clk.c),
},
};
@@ -2306,10 +2306,10 @@
.ns_mask = BM(15, 12),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_dsi_byte,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "dsi2_esc_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(dsi2_esc_clk.c),
},
};
@@ -2373,10 +2373,10 @@
.set_rate = set_rate_mnd_banked,
.freq_tbl = clk_tbl_gfx2d,
.bank_masks = &bmnd_info_gfx2d0,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "gfx2d0_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(gfx2d0_clk.c),
},
};
@@ -2413,10 +2413,10 @@
.set_rate = set_rate_mnd_banked,
.freq_tbl = clk_tbl_gfx2d,
.bank_masks = &bmnd_info_gfx2d1,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "gfx2d1_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(gfx2d1_clk.c),
},
};
@@ -2482,10 +2482,10 @@
.set_rate = set_rate_mnd_banked,
.freq_tbl = clk_tbl_gfx3d,
.bank_masks = &bmnd_info_gfx3d,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "gfx3d_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(gfx3d_clk.c),
.depends = &gmem_axi_clk.c,
},
@@ -2531,10 +2531,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_ijpeg,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "ijpeg_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(ijpeg_clk.c),
.depends = &ijpeg_axi_clk.c,
},
@@ -2571,10 +2571,10 @@
.ns_mask = (BM(15, 12) | BM(2, 0)),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_jpegd,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "jpegd_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(jpegd_clk.c),
.depends = &jpegd_axi_clk.c,
},
@@ -2641,10 +2641,10 @@
.set_rate = set_rate_mnd_banked,
.freq_tbl = clk_tbl_mdp,
.bank_masks = &bmnd_info_mdp,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mdp_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(mdp_clk.c),
.depends = &mdp_axi_clk.c,
},
@@ -2690,10 +2690,10 @@
.ns_mask = BIT(13),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_mdp_vsync,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mdp_vsync_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(mdp_vsync_clk.c),
},
};
@@ -2748,10 +2748,10 @@
.set_rate = set_rate_div_banked,
.freq_tbl = clk_tbl_rot,
.bank_masks = &bdiv_info_rot,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "rot_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(rot_clk.c),
.depends = &rot_axi_clk.c,
},
@@ -2849,10 +2849,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_tv,
.freq_tbl = clk_tbl_tv,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "tv_src_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(tv_src_clk.c),
},
};
@@ -2993,10 +2993,10 @@
.set_rate = set_rate_mnd_banked,
.bank_masks = &bmnd_info_vcodec,
.freq_tbl = clk_tbl_vcodec,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "vcodec_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(vcodec_clk.c),
.depends = &vcodec_axi_clk.c,
},
@@ -3036,10 +3036,10 @@
.ns_mask = (BM(15, 12) | BM(2, 0)),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_vpe,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "vpe_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(vpe_clk.c),
.depends = &vpe_axi_clk.c,
},
@@ -3093,10 +3093,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_vfe,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "vfe_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(vfe_clk.c),
.depends = &vfe_axi_clk.c,
},
@@ -3163,10 +3163,10 @@
.ns_mask = (BM(31, 24) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_aif_osr, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8960, \
+ .ops = &clk_ops_rcg_8960, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -3187,10 +3187,10 @@
.ns_mask = (BM(31, 24) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_aif_osr, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8960, \
+ .ops = &clk_ops_rcg_8960, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -3221,10 +3221,10 @@
.ns_mask = BM(14, 10), \
.set_rate = set_rate_nop, \
.freq_tbl = clk_tbl_aif_bit, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8960, \
+ .ops = &clk_ops_rcg_8960, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -3257,10 +3257,10 @@
.ns_mask = BM(18, 10), \
.set_rate = set_rate_nop, \
.freq_tbl = clk_tbl_aif_bit_div, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8960, \
+ .ops = &clk_ops_rcg_8960, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -3330,10 +3330,10 @@
.ns_mask = (BM(31, 16) | BM(6, 0)),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_pcm,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "pcm_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(pcm_clk.c),
},
};
@@ -3354,10 +3354,10 @@
.ns_mask = (BM(31, 24) | BM(6, 0)),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_aif_osr,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "audio_slimbus_clk",
- .ops = &soc_clk_ops_8960,
+ .ops = &clk_ops_rcg_8960,
CLK_INIT(audio_slimbus_clk.c),
},
};
diff --git a/arch/arm/mach-msm/clock-8x60.c b/arch/arm/mach-msm/clock-8x60.c
index a1bf439..8f5ee70 100644
--- a/arch/arm/mach-msm/clock-8x60.c
+++ b/arch/arm/mach-msm/clock-8x60.c
@@ -518,7 +518,7 @@
return branch_reset(&to_rcg_clk(clk)->b, action);
}
-static struct clk_ops soc_clk_ops_8x60 = {
+static struct clk_ops clk_ops_rcg_8x60 = {
.enable = rcg_clk_enable,
.disable = rcg_clk_disable,
.auto_off = rcg_clk_auto_off,
@@ -1031,10 +1031,10 @@
.ns_mask = (BM(31, 16) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_gsbi_uart, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8x60, \
+ .ops = &clk_ops_rcg_8x60, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -1095,10 +1095,10 @@
.ns_mask = (BM(23, 16) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_gsbi_qup, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8x60, \
+ .ops = &clk_ops_rcg_8x60, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -1165,10 +1165,10 @@
.ns_mask = BM(1, 0),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_pdm,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "pdm_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(pdm_clk.c),
},
};
@@ -1208,10 +1208,10 @@
},
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_prng,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "prng_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(prng_clk.c),
},
};
@@ -1232,10 +1232,10 @@
.ns_mask = (BM(23, 16) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_sdc, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8x60, \
+ .ops = &clk_ops_rcg_8x60, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -1294,10 +1294,10 @@
.ns_mask = (BM(31, 16) | BM(6, 0)),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_tsif_ref,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "tsif_ref_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(tsif_ref_clk.c),
},
};
@@ -1326,10 +1326,10 @@
.ns_mask = BM(1, 0),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_tssc,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "tssc_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(tssc_clk.c),
},
};
@@ -1364,10 +1364,10 @@
.ns_mask = (BM(23, 16) | BM(6, 0)),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_usb,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "usb_hs1_xcvr_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(usb_hs1_xcvr_clk.c),
},
};
@@ -1396,10 +1396,10 @@
.ns_mask = (BM(23, 16) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_usb, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8x60, \
+ .ops = &clk_ops_rcg_8x60, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -2006,10 +2006,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd_8,
.freq_tbl = clk_tbl_cam,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "cam_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(cam_clk.c),
},
};
@@ -2038,10 +2038,10 @@
.ns_mask = (BM(15, 12) | BM(2, 0)),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_csi,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "csi_src_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(csi_src_clk.c),
},
};
@@ -2109,10 +2109,10 @@
.ns_mask = BM(27, 24),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_dsi_byte,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "dsi_byte_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(dsi_byte_clk.c),
},
};
@@ -2190,10 +2190,10 @@
.set_rate = set_rate_mnd_banked,
.freq_tbl = clk_tbl_gfx2d,
.bank_masks = &bmnd_info_gfx2d0,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "gfx2d0_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(gfx2d0_clk.c),
},
};
@@ -2230,10 +2230,10 @@
.set_rate = set_rate_mnd_banked,
.freq_tbl = clk_tbl_gfx2d,
.bank_masks = &bmnd_info_gfx2d1,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "gfx2d1_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(gfx2d1_clk.c),
},
};
@@ -2299,10 +2299,10 @@
.set_rate = set_rate_mnd_banked,
.freq_tbl = clk_tbl_gfx3d,
.bank_masks = &bmnd_info_gfx3d,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "gfx3d_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(gfx3d_clk.c),
.depends = &gmem_axi_clk.c,
},
@@ -2348,10 +2348,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_ijpeg,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "ijpeg_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(ijpeg_clk.c),
.depends = &ijpeg_axi_clk.c,
},
@@ -2388,10 +2388,10 @@
.ns_mask = (BM(15, 12) | BM(2, 0)),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_jpegd,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "jpegd_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(jpegd_clk.c),
.depends = &jpegd_axi_clk.c,
},
@@ -2458,10 +2458,10 @@
.set_rate = set_rate_mnd_banked,
.freq_tbl = clk_tbl_mdp,
.bank_masks = &bmnd_info_mdp,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mdp_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(mdp_clk.c),
.depends = &mdp_axi_clk.c,
},
@@ -2492,10 +2492,10 @@
.ns_mask = BIT(13),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_mdp_vsync,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "mdp_vsync_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(mdp_vsync_clk.c),
},
};
@@ -2542,10 +2542,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_pixel_mdp,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "pixel_mdp_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(pixel_mdp_clk.c),
},
};
@@ -2615,10 +2615,10 @@
.set_rate = set_rate_div_banked,
.freq_tbl = clk_tbl_rot,
.bank_masks = &bdiv_info_rot,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "rot_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(rot_clk.c),
.depends = &rot_axi_clk.c,
},
@@ -2665,10 +2665,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_tv,
.freq_tbl = clk_tbl_tv,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "tv_src_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(tv_src_clk.c),
},
};
@@ -2794,10 +2794,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_vcodec,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "vcodec_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(vcodec_clk.c),
.depends = &vcodec_axi_clk.c,
},
@@ -2838,10 +2838,10 @@
.ns_mask = (BM(15, 12) | BM(2, 0)),
.set_rate = set_rate_nop,
.freq_tbl = clk_tbl_vpe,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "vpe_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(vpe_clk.c),
.depends = &vpe_axi_clk.c,
},
@@ -2894,10 +2894,10 @@
.ctl_mask = BM(7, 6),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_vfe,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "vfe_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(vfe_clk.c),
.depends = &vfe_axi_clk.c,
},
@@ -2981,10 +2981,10 @@
.ns_mask = (BM(31, 24) | BM(6, 0)), \
.set_rate = set_rate_mnd, \
.freq_tbl = clk_tbl_aif_osr, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8x60, \
+ .ops = &clk_ops_rcg_8x60, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -3015,10 +3015,10 @@
.ns_mask = BM(14, 10), \
.set_rate = set_rate_nop, \
.freq_tbl = clk_tbl_aif_bit, \
- .current_freq = &local_dummy_freq, \
+ .current_freq = &rcg_dummy_freq, \
.c = { \
.dbg_name = #i "_clk", \
- .ops = &soc_clk_ops_8x60, \
+ .ops = &clk_ops_rcg_8x60, \
CLK_INIT(i##_clk.c), \
}, \
}
@@ -3088,10 +3088,10 @@
.ns_mask = (BM(31, 16) | BM(6, 0)),
.set_rate = set_rate_mnd,
.freq_tbl = clk_tbl_pcm,
- .current_freq = &local_dummy_freq,
+ .current_freq = &rcg_dummy_freq,
.c = {
.dbg_name = "pcm_clk",
- .ops = &soc_clk_ops_8x60,
+ .ops = &clk_ops_rcg_8x60,
CLK_INIT(pcm_clk.c),
},
};
diff --git a/arch/arm/mach-msm/clock-local.c b/arch/arm/mach-msm/clock-local.c
index b7542c8..6914c0b 100644
--- a/arch/arm/mach-msm/clock-local.c
+++ b/arch/arm/mach-msm/clock-local.c
@@ -46,7 +46,7 @@
#define HALT_CHECK_DELAY_US 10
DEFINE_SPINLOCK(local_clock_reg_lock);
-struct clk_freq_tbl local_dummy_freq = F_END;
+struct clk_freq_tbl rcg_dummy_freq = F_END;
unsigned local_sys_vdd_votes[NUM_SYS_VDD_LEVELS];
static DEFINE_SPINLOCK(sys_vdd_vote_lock);
@@ -391,7 +391,7 @@
u32 reg_val;
void __iomem *const reg = clk->b.ctl_reg;
- WARN(clk->current_freq == &local_dummy_freq,
+ WARN(clk->current_freq == &rcg_dummy_freq,
"Attempting to enable %s before setting its rate. "
"Set the rate first!\n", clk->c.dbg_name);
diff --git a/arch/arm/mach-msm/clock-local.h b/arch/arm/mach-msm/clock-local.h
index 7367f6e..6721f2c 100644
--- a/arch/arm/mach-msm/clock-local.h
+++ b/arch/arm/mach-msm/clock-local.h
@@ -141,6 +141,8 @@
return container_of(clk, struct rcg_clk, c);
}
+extern struct clk_freq_tbl rcg_dummy_freq;
+
int rcg_clk_enable(struct clk *clk);
void rcg_clk_disable(struct clk *clk);
void rcg_clk_auto_off(struct clk *clk);
@@ -291,7 +293,6 @@
* Variables from clock-local driver
*/
extern spinlock_t local_clock_reg_lock;
-extern struct clk_freq_tbl local_dummy_freq;
extern struct fixed_clk gnd_clk;
/*