)]}'
{
  "commit": "84f62d4b5888bd1a254d6055e5ff6989bae8a6a9",
  "tree": "78421a00358767a96d96c88b2a9aa0bc0aaa5e83",
  "parents": [
    "8c185ab6185bf5e67766edb000ce428269364c86"
  ],
  "author": {
    "name": "Peter P Waskiewicz Jr",
    "email": "peter.p.waskiewicz.jr@intel.com",
    "time": "Wed Sep 30 12:07:16 2009 +0000"
  },
  "committer": {
    "name": "David S. Miller",
    "email": "davem@davemloft.net",
    "time": "Wed Sep 30 20:02:52 2009 -0700"
  },
  "message": "ixgbe: Fix disabling of relaxed ordering with Tx DCA\n\n82599 has a different register offset for the Tx DCA control registers.\nWe disable relaxed ordering of the descriptor writebacks for Tx head\nwriteback, but didn\u0027t disable it properly for 82599.  However, this\nshouldn\u0027t be a visible issue, since ixgbe doesn\u0027t use Tx head writeback.\nThis patch just makes sure we\u0027re not doing blind writes to offsets we\ndon\u0027t expect.\n\nSigned-off-by: Peter P Waskiewicz Jr \u003cpeter.p.waskiewicz.jr@intel.com\u003e\nSigned-off-by: Jeff Kirsher \u003cjeffrey.t.kirsher@intel.com\u003e\nSigned-off-by: David S. Miller \u003cdavem@davemloft.net\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "c407bd9de0dd87644556efcb5b717a835c4657d6",
      "old_mode": 33188,
      "old_path": "drivers/net/ixgbe/ixgbe_main.c",
      "new_id": "fe52736658366b53686b2cfdd6e7e5c7a93bdc72",
      "new_mode": 33188,
      "new_path": "drivers/net/ixgbe/ixgbe_main.c"
    }
  ]
}