)]}'
{
  "commit": "85488037bb9b533b064be66412dbe1dbcd2734d9",
  "tree": "844445f441b716130aaa4ba08d02a8ec3ba04e72",
  "parents": [
    "367da1527aff2a4f789d03082f9fb191cdf332c4"
  ],
  "author": {
    "name": "Mark Brown",
    "email": "broonie@opensource.wolfsonmicro.com",
    "time": "Sat Sep 05 18:52:16 2009 +0100"
  },
  "committer": {
    "name": "Mark Brown",
    "email": "broonie@opensource.wolfsonmicro.com",
    "time": "Sat Sep 05 18:52:16 2009 +0100"
  },
  "message": "ASoC: Add source argument to PLL configuration\n\nMore and more devices feature PLLs and FLLs with the ability to select\nbetween multiple input clocks. In order to better support these devices\na new argument, source, has been added to the set_pll() configuration\nAPI. Using set_clkdiv() is often difficult due to the need to stop the\nPLL/FLL before any reconfiguration can be done.\n\nSigned-off-by: Mark Brown \u003cbroonie@opensource.wolfsonmicro.com\u003e\n",
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