)]}'
{
  "commit": "85ccfb2d8cd150f6216bcfc209ceec4615182e6f",
  "tree": "d48abee2e9018587cd41dcbb945b0def9ad89860",
  "parents": [
    "a58b9e712f911cc58716e96b5ad7af46d9c16d0d"
  ],
  "author": {
    "name": "johny",
    "email": "mjshai@codeaurora.org",
    "time": "Tue Aug 06 03:04:50 2013 -0700"
  },
  "committer": {
    "name": "Yamit Mehta",
    "email": "ymehta@codeaurora.org",
    "time": "Tue Aug 13 10:52:49 2013 +0530"
  },
  "message": "ASoC: wcd9304: Fix DMIC current leakage after disable\n\nObserved after disabling DMIC path, some DMICs observe\npower leakage of around 2mA and affecting power numbers.\nThis happens due to the DMIC clock runs off MCLK. 2 Stage\nof Dividers are used to  generate various DMIC Clock Freq.\nSince the SW Enable/Disabling is async to MCLK, the Divider\nwill either hold the last stage 0 or 1.\nManually force the digital mic clock pin to GPIO mode from\nfunctional mode through the TLMM mux option and force the value\nof DMIC voltage to 0V. This will avoid any current leakage.\n\nChange-Id: If676801df4e77047c85167453139541629f981d8\nCRs-Fixed: 526779\nSigned-off-by: johny \u003cmjshai@codeaurora.org\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "010ecae0c44488a9015e1711a4e77038ddcd1327",
      "old_mode": 33188,
      "old_path": "sound/soc/codecs/wcd9304.c",
      "new_id": "09894ef1b7415d9d3bae193534cbe5623099ac2f",
      "new_mode": 33188,
      "new_path": "sound/soc/codecs/wcd9304.c"
    }
  ]
}