msm: pil-riva: Enable CXO clock to access PMU
The PMU registers are clocked from CXO out of power on reset.
Turn on the CXO clock so that these registers are accessible.
While we're here switch to the clk API instead of the XO buffer
interface.
Change-Id: Ia7e1be18531f8983368a037a9037c62c4d834403
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index d9e1724..329035f 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -4813,6 +4813,7 @@
static struct clk_lookup msm_clocks_8064[] = {
CLK_LOOKUP("cxo", cxo_clk.c, NULL),
+ CLK_LOOKUP("cxo", cxo_clk.c, "pil_riva"),
CLK_LOOKUP("pll2", pll2_clk.c, NULL),
CLK_LOOKUP("pll8", pll8_clk.c, NULL),
CLK_LOOKUP("pll4", pll4_clk.c, NULL),
@@ -5050,6 +5051,7 @@
static struct clk_lookup msm_clocks_8960_v1[] __initdata = {
CLK_LOOKUP("cxo", cxo_clk.c, NULL),
+ CLK_LOOKUP("cxo", cxo_clk.c, "pil_riva"),
CLK_LOOKUP("pll2", pll2_clk.c, NULL),
CLK_LOOKUP("pll8", pll8_clk.c, NULL),
CLK_LOOKUP("pll4", pll4_clk.c, NULL),
diff --git a/arch/arm/mach-msm/pil-riva.c b/arch/arm/mach-msm/pil-riva.c
index f977897..7e78a15 100644
--- a/arch/arm/mach-msm/pil-riva.c
+++ b/arch/arm/mach-msm/pil-riva.c
@@ -20,9 +20,9 @@
#include <linux/platform_device.h>
#include <linux/regulator/consumer.h>
#include <linux/workqueue.h>
+#include <linux/clk.h>
#include <mach/msm_iomap.h>
-#include <mach/msm_xo.h>
#include "peripheral-loader.h"
#include "scm-pas.h"
@@ -82,7 +82,7 @@
struct riva_data {
void __iomem *base;
unsigned long start_addr;
- struct msm_xo_voter *xo;
+ struct clk *xo;
bool use_cxo;
struct delayed_work work;
struct regulator *pll_supply;
@@ -93,8 +93,11 @@
struct riva_data *drv = dev_get_drvdata(dev);
int ret;
- if (drv->use_cxo)
- msm_xo_mode_vote(drv->xo, MSM_XO_MODE_ON);
+ if (drv->use_cxo) {
+ ret = clk_prepare_enable(drv->xo);
+ if (ret)
+ dev_err(dev, "failed to enable xo\n");
+ }
ret = regulator_enable(drv->pll_supply);
if (ret)
dev_err(dev, "failed to enable pll supply\n");
@@ -106,7 +109,7 @@
struct riva_data *drv = container_of(work, struct riva_data, work.work);
regulator_disable(drv->pll_supply);
if (drv->use_cxo)
- msm_xo_mode_vote(drv->xo, MSM_XO_MODE_OFF);
+ clk_disable_unprepare(drv->xo);
}
static void pil_riva_remove_proxy_votes_now(struct device *dev)
@@ -142,7 +145,11 @@
struct riva_data *drv = dev_get_drvdata(pil->dev);
void __iomem *base = drv->base;
unsigned long start_addr = drv->start_addr;
+ int ret;
+ ret = clk_prepare_enable(drv->xo);
+ if (ret)
+ return ret;
/* Enable A2XB bridge */
reg = readl_relaxed(base + RIVA_PMU_A2XB_CFG);
reg |= RIVA_PMU_A2XB_CFG_EN;
@@ -231,6 +238,7 @@
/* Take cCPU out of reset */
reg |= RIVA_PMU_OVRD_VAL_CCPU_RESET;
writel_relaxed(reg, base + RIVA_PMU_OVRD_VAL);
+ clk_disable_unprepare(drv->xo);
return 0;
}
@@ -239,7 +247,11 @@
{
struct riva_data *drv = dev_get_drvdata(pil->dev);
u32 reg;
+ int ret;
+ ret = clk_prepare_enable(drv->xo);
+ if (ret)
+ return ret;
/* Put cCPU and cCPU clock into reset */
reg = readl_relaxed(drv->base + RIVA_PMU_OVRD_VAL);
reg &= ~(RIVA_PMU_OVRD_VAL_CCPU_RESET | RIVA_PMU_OVRD_VAL_CCPU_CLK);
@@ -258,6 +270,7 @@
writel_relaxed(0, RIVA_RESET);
mb();
+ clk_disable_unprepare(drv->xo);
pil_riva_remove_proxy_votes_now(pil->dev);
return 0;
@@ -278,16 +291,30 @@
static int pil_riva_reset_trusted(struct pil_desc *pil)
{
+ struct riva_data *drv = dev_get_drvdata(pil->dev);
+ int ret;
+
+ ret = clk_prepare_enable(drv->xo);
+ if (ret)
+ return ret;
/* Proxy-vote for resources RIVA needs */
pil_riva_make_proxy_votes(pil->dev);
- return pas_auth_and_reset(PAS_RIVA);
+ ret = pas_auth_and_reset(PAS_RIVA);
+ clk_disable_unprepare(drv->xo);
+ return ret;
}
static int pil_riva_shutdown_trusted(struct pil_desc *pil)
{
- int ret = pas_shutdown(PAS_RIVA);
+ int ret;
+ struct riva_data *drv = dev_get_drvdata(pil->dev);
+ ret = clk_prepare_enable(drv->xo);
+ if (ret)
+ return ret;
+ ret = pas_shutdown(PAS_RIVA);
pil_riva_remove_proxy_votes_now(pil->dev);
+ clk_disable_unprepare(drv->xo);
return ret;
}
@@ -351,7 +378,7 @@
dev_info(&pdev->dev, "using non-secure boot\n");
}
- drv->xo = msm_xo_get(MSM_XO_CXO, desc->name);
+ drv->xo = clk_get(&pdev->dev, "cxo");
if (IS_ERR(drv->xo)) {
ret = PTR_ERR(drv->xo);
goto err;
@@ -364,7 +391,7 @@
return 0;
err_register:
cancel_delayed_work_sync(&drv->work);
- msm_xo_put(drv->xo);
+ clk_put(drv->xo);
err:
regulator_put(drv->pll_supply);
return ret;
@@ -374,7 +401,7 @@
{
struct riva_data *drv = platform_get_drvdata(pdev);
cancel_delayed_work_sync(&drv->work);
- msm_xo_put(drv->xo);
+ clk_put(drv->xo);
regulator_put(drv->pll_supply);
return 0;
}