)]}'
{
  "commit": "8830f04a092b47f3d246271b24685cd9eab82027",
  "tree": "8258af450ec736fd0ff3cf0864eb5407b3f8b5ff",
  "parents": [
    "d411b845dcc8e1d97e8b02a345e765af5134700f"
  ],
  "author": {
    "name": "Russell King",
    "email": "rmk@dyn-67.arm.linux.org.uk",
    "time": "Mon Jun 20 09:51:03 2005 +0100"
  },
  "committer": {
    "name": "Russell King",
    "email": "rmk@dyn-67.arm.linux.org.uk",
    "time": "Mon Jun 20 09:51:03 2005 +0100"
  },
  "message": "[PATCH] ARM: Fix delayed dcache flush for ARMv6 non-aliasing caches\n\nflush_dcache_page() did nothing for these caches, but since they\nsuffer from I/D cache coherency issues, we need to ensure that data\nis written back to RAM.\n\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "01967ddeef53df2cb72bda5d600419e63c392f82",
      "old_mode": 33188,
      "old_path": "arch/arm/mm/fault-armv.c",
      "new_id": "be4ab3d73c91965448f064448136f7c078d9fb30",
      "new_mode": 33188,
      "new_path": "arch/arm/mm/fault-armv.c"
    },
    {
      "type": "modify",
      "old_id": "4085ed983e46e07c3ac62ba31f8b0e605ee2594c",
      "old_mode": 33188,
      "old_path": "arch/arm/mm/flush.c",
      "new_id": "191788fb18d13a4f3adad73afd92a649c0c7ff21",
      "new_mode": 33188,
      "new_path": "arch/arm/mm/flush.c"
    }
  ]
}