gpio: Add PMIC GPIO block support
Moorestown has PMIC chip which contains GPIO blocks. The PMIC chip is
connected to Langwell by SPI interface. So this GPIO driver will be regarded
as SPI GPIO expander though the actual GPIO access is through IPC and SRAM.
The SPI master contoller will probe this device driver by parsing SPIB table.
Cleaned up for new IPC, GPE removed and some printk and other tidying by
Alan Cox. Fixes for points noted by Matthew Garrett
Signed-off-by: Alek Du <alek.du@intel.com>
Signed-off-by: Alan Cox <alan@linux.intel.com>
Signed-off-by: Matthew Garrett <mjg@redhat.com>
diff --git a/drivers/platform/x86/Kconfig b/drivers/platform/x86/Kconfig
index 2189565..ca30e56 100644
--- a/drivers/platform/x86/Kconfig
+++ b/drivers/platform/x86/Kconfig
@@ -540,6 +540,13 @@
some embedded Intel x86 platforms. This is not needed for PC-type
machines.
+config GPIO_INTEL_PMIC
+ bool "Intel PMIC GPIO support"
+ depends on INTEL_SCU_IPC && GPIOLIB
+ ---help---
+ Say Y here to support GPIO via the SCU IPC interface
+ on Intel MID platforms.
+
config RAR_REGISTER
bool "Restricted Access Region Register Driver"
depends on PCI && X86_MRST