| commit | 89e162afd37caa6acab4e05b6e9e9fad6235381e | [log] [tgz] |
|---|---|---|
| author | Rongjun Ying <rongjun.ying@csr.com> | Fri Jul 08 02:40:14 2011 -0700 |
| committer | Barry Song <21cnbao@gmail.com> | Sat Jul 09 07:21:53 2011 +0800 |
| tree | ac5dafe6664ab1e5fab867fcef7d8a7c685d8f78 | |
| parent | 31adb06f9d68f9d033284c9ab0e264b2d581bceb [diff] [blame] |
ARM: CSR: initializing L2 cache Signed-off-by: Rongjun Ying <rongjun.ying@csr.com> Signed-off-by: Barry Song <baohua.song@csr.com> Reviewed-by: Arnd Bergmann <arnd@arndb.de>
diff --git a/arch/arm/mach-prima2/Makefile b/arch/arm/mach-prima2/Makefile index f2fba66..7af7fc0 100644 --- a/arch/arm/mach-prima2/Makefile +++ b/arch/arm/mach-prima2/Makefile
@@ -4,3 +4,4 @@ obj-y += rstc.o obj-y += prima2.o obj-$(CONFIG_DEBUG_LL) += lluart.o +obj-$(CONFIG_CACHE_L2X0) += l2x0.o