)]}'
{
  "commit": "8d47bae004f062630f69f7f83d098424252e232d",
  "tree": "68379790587eef10926d029ffce74b763175b10c",
  "parents": [
    "234f2df56f5b05756c444edc9879145deddf69f4"
  ],
  "author": {
    "name": "Guennadi Liakhovetski",
    "email": "g.liakhovetski@gmx.de",
    "time": "Wed Mar 25 09:13:24 2009 -0700"
  },
  "committer": {
    "name": "Dan Williams",
    "email": "dan.j.williams@intel.com",
    "time": "Wed Mar 25 09:13:24 2009 -0700"
  },
  "message": "dma: i.MX31 IPU DMA robustness improvements\n\nAdd DMA error handling to the ISR, move common code fragments to functions, fix\nscatter-gather element queuing in the ISR, survive channel freeing and\nre-allocation in a quick succession.\n\nSigned-off-by: Guennadi Liakhovetski \u003clg@denx.de\u003e\nSigned-off-by: Dan Williams \u003cdan.j.williams@intel.com\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "b759ae9315ba77a62aebaa19c900732008e0723a",
      "old_mode": 33188,
      "old_path": "drivers/dma/ipu/ipu_idmac.c",
      "new_id": "0a525c450f24faf2f1cb3a8f4c67f981f5222225",
      "new_mode": 33188,
      "new_path": "drivers/dma/ipu/ipu_idmac.c"
    }
  ]
}