ARM: hw_breakpoint: enable HAVE_HW_BREAKPOINT feature flag
HAVE_HW_BREAKPOINT was disabled temporarily from commit
480a82f59712136b51ee5ca05c4f22c1738010c5. Issue not seen with the
latest kernel hence re-enable the feature and fix merge issue from
previous kernel upgrade.
Change-Id: Ia6e7e8282c848dd73108e4d951b3375bb7caa63c
CRs-Fixed: 460454
Signed-off-by: Jin Hong <jinh@codeaurora.org>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
diff --git a/arch/arm/kernel/hw_breakpoint.c b/arch/arm/kernel/hw_breakpoint.c
index 34a48a1..1692129 100644
--- a/arch/arm/kernel/hw_breakpoint.c
+++ b/arch/arm/kernel/hw_breakpoint.c
@@ -865,18 +865,6 @@
return ret;
}
-static void reset_brps_reserved_reg(int n)
-{
- int i;
-
- /* we must also reset any reserved registers. */
- for (i = 0; i < n; ++i) {
- write_wb_reg(ARM_BASE_BCR + i, 0UL);
- write_wb_reg(ARM_BASE_BVR + i, 0UL);
- }
-
-}
-
/*
* One-time initialisation.
*/
@@ -903,7 +891,7 @@
static void reset_ctrl_regs(void *unused)
{
- int i, err = 0, cpu = smp_processor_id();
+ int i, raw_num_brps, err = 0, cpu = smp_processor_id();
u32 dbg_power;
/*
@@ -962,11 +950,12 @@
if (halting_mode_enabled())
return;
-#ifdef CONFIG_HAVE_HW_BRKPT_RESERVED_RW_ACCESS
- reset_brps_reserved_reg(core_num_brps);
-#else
- reset_brps_reserved_reg(core_num_brps + core_num_reserved_brps);
-#endif
+ /* We must also reset any reserved registers. */
+ raw_num_brps = get_num_brp_resources();
+ for (i = 0; i < raw_num_brps; ++i) {
+ write_wb_reg(ARM_BASE_BCR + i, 0UL);
+ write_wb_reg(ARM_BASE_BVR + i, 0UL);
+ }
for (i = 0; i < core_num_wrps; ++i) {
write_wb_reg(ARM_BASE_WCR + i, 0UL);