ARM: perf: add support for the Cortex-A15 PMU
This patch adds support for the Cortex-A15 PMU to the ARMv7
perf-event backend.
Change-Id: I1f7824c901a8c70bf66bdbb3976b506f5addeb6f
Signed-off-by: Will Deacon <will.deacon@arm.com>
Signed-off-by: Taniya Das <tdas@codeaurora.org>
diff --git a/arch/arm/kernel/perf_event.c b/arch/arm/kernel/perf_event.c
index 9cb1625..c8f963c 100644
--- a/arch/arm/kernel/perf_event.c
+++ b/arch/arm/kernel/perf_event.c
@@ -683,6 +683,9 @@
case 0xC050: /* Cortex-A5 */
armpmu = armv7_a5_pmu_init();
break;
+ case 0xC0F0: /* Cortex-A15 */
+ armpmu = armv7_a15_pmu_init();
+ break;
}
/* Intel CPUs [xscale]. */
} else if (0x69 == implementor) {