)]}'
{
  "commit": "91d3f9bacdb4950d2f79fe2ba296aa249f60d06c",
  "tree": "3409f69ef76a28734a492af8803ea9653ee0b4a8",
  "parents": [
    "51bb296b09a83ee1aae025778db38f9d2cc7bb1a",
    "4204878179c99d419d392d78d817729992b4c442"
  ],
  "author": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Wed Nov 04 07:05:43 2009 -0800"
  },
  "committer": {
    "name": "Linus Torvalds",
    "email": "torvalds@linux-foundation.org",
    "time": "Wed Nov 04 07:05:43 2009 -0800"
  },
  "message": "Merge branch \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel\n\n* \u0027for-linus\u0027 of git://git.kernel.org/pub/scm/linux/kernel/git/anholt/drm-intel:\n  drm/i915: Ironlake suspend/resume support\n  drm/i915: kill warning in intel_find_pll_g4x_dp\n  drm/i915: update watermarks before enabling PLLs\n  drm/i915: add FIFO watermark support for G4x\n  drm/i915: quiet DP i2c init\n  drm/i915: fix panel fitting filter coefficient select for Ironlake\n  drm/i915: fix to setup display reference clock control on Ironlake\n  drm/i915: Install a fence register for fbc on g4x\n  drm/i915: save/restore BLC histogram control reg across suspend/resume\n  drm/i915: Fix FDI M/N setting according with correct color depth\n  drm/i915: disable powersave feature for Ironlake currently\n  drm/i915: Fix render reclock availability detection.\n  drm/i915: Save and restore the GM45 FBC regs on suspend and resume.\n  drm/i915: Set the LVDS_BORDER when using LVDS scaling mode\n  drm/i915: disable FBC for Pineview, fixing a boot hang.\n",
  "tree_diff": []
}