msm: clock-8960: Chain dependencies between vcodec AXI clocks

Don't require drivers to explicitly enable/disable vcodec_clk,
vcodec_axi_a_clk and vcodec_axi_b_clk since, in practice, all
three are always needed at the same time.

Create a dependency chain for these clocks so that enabling
vcodec_clk enables all the rest.  The chain looks like:

vcodec_clk->vcodec_axi_clk->vcodec_axi_a_clk->vcodec_axi_b_clk

Signed-off-by: Matt Wagantall <mattw@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 0e82a78..ad984ab 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -523,38 +523,6 @@
 	},
 };
 
-static struct branch_clk vcodec_axi_clk = {
-	.b = {
-		.ctl_reg = MAXI_EN_REG,
-		.en_mask = BIT(19),
-		.reset_reg = SW_RESET_AXI_REG,
-		.reset_mask = BIT(7),
-		.halt_reg = DBG_BUS_VEC_E_REG,
-		.halt_bit = 3,
-	},
-	.c = {
-		.dbg_name = "vcodec_axi_clk",
-		.ops = &clk_ops_branch,
-		CLK_INIT(vcodec_axi_clk.c),
-	},
-};
-
-static struct branch_clk vcodec_axi_a_clk = {
-	.b = {
-		.ctl_reg = MAXI_EN4_REG,
-		.en_mask = BIT(25),
-		.reset_reg = SW_RESET_AXI_REG,
-		.reset_mask = BIT(5),
-		.halt_reg = DBG_BUS_VEC_I_REG,
-		.halt_bit = 26,
-	},
-	.c = {
-		.dbg_name = "vcodec_axi_a_clk",
-		.ops = &clk_ops_branch,
-		CLK_INIT(vcodec_axi_a_clk.c),
-	},
-};
-
 static struct branch_clk vcodec_axi_b_clk = {
 	.b = {
 		.ctl_reg = MAXI_EN4_REG,
@@ -571,6 +539,40 @@
 	},
 };
 
+static struct branch_clk vcodec_axi_a_clk = {
+	.b = {
+		.ctl_reg = MAXI_EN4_REG,
+		.en_mask = BIT(25),
+		.reset_reg = SW_RESET_AXI_REG,
+		.reset_mask = BIT(5),
+		.halt_reg = DBG_BUS_VEC_I_REG,
+		.halt_bit = 26,
+	},
+	.depends = &vcodec_axi_b_clk.c,
+	.c = {
+		.dbg_name = "vcodec_axi_a_clk",
+		.ops = &clk_ops_branch,
+		CLK_INIT(vcodec_axi_a_clk.c),
+	},
+};
+
+static struct branch_clk vcodec_axi_clk = {
+	.b = {
+		.ctl_reg = MAXI_EN_REG,
+		.en_mask = BIT(19),
+		.reset_reg = SW_RESET_AXI_REG,
+		.reset_mask = BIT(7),
+		.halt_reg = DBG_BUS_VEC_E_REG,
+		.halt_bit = 3,
+	},
+	.depends = &vcodec_axi_a_clk.c,
+	.c = {
+		.dbg_name = "vcodec_axi_clk",
+		.ops = &clk_ops_branch,
+		CLK_INIT(vcodec_axi_clk.c),
+	},
+};
+
 static struct branch_clk vfe_axi_clk = {
 	.b = {
 		.ctl_reg = MAXI_EN_REG,