msm: iommu: Enable use of TTBR1 register of IOMMU
Add a new platform data in iommu devices to indicate whether ttbr1
should be used which also dictates how the address space should be
split between ttbr0 and ttbr1.
Change-Id: Iab3aac74256bd4d49f47f89e6638f014e6e539e9
Signed-off-by: Shubhraprakash Das <sadas@codeaurora.org>
diff --git a/arch/arm/mach-msm/iommu.c b/arch/arm/mach-msm/iommu.c
index a310ba0..d495c1b 100644
--- a/arch/arm/mach-msm/iommu.c
+++ b/arch/arm/mach-msm/iommu.c
@@ -176,7 +176,8 @@
}
static void __program_context(void __iomem *base, int ctx, int ncb,
- phys_addr_t pgtable, int redirect)
+ phys_addr_t pgtable, int redirect,
+ int ttbr_split)
{
unsigned int prrr, nmrr;
int i, j, found;
@@ -189,8 +190,10 @@
/* V2P configuration: HTW for access */
SET_V2PCFG(base, ctx, 0x3);
- SET_TTBCR(base, ctx, 0);
+ SET_TTBCR(base, ctx, ttbr_split);
SET_TTBR0_PA(base, ctx, (pgtable >> TTBR0_PA_SHIFT));
+ if (ttbr_split)
+ SET_TTBR1_PA(base, ctx, (pgtable >> TTBR1_PA_SHIFT));
/* Enable context fault interrupt */
SET_CFEIE(base, ctx, 1);
@@ -365,7 +368,8 @@
goto fail;
__program_context(iommu_drvdata->base, ctx_dev->num, iommu_drvdata->ncb,
- __pa(priv->pgtable), priv->redirect);
+ __pa(priv->pgtable), priv->redirect,
+ iommu_drvdata->ttbr_split);
__disable_clocks(iommu_drvdata);
list_add(&(ctx_drvdata->attached_elm), &priv->list_attached);