|  | /* | 
|  | * Device Tree Source for ACube Sam440ep  based off bamboo.dts code | 
|  | * original copyrights below | 
|  | * | 
|  | * Copyright (c) 2006, 2007 IBM Corp. | 
|  | * Josh Boyer <jwboyer@linux.vnet.ibm.com> | 
|  | * | 
|  | * Modified from bamboo.dts for sam440ep: | 
|  | * Copyright 2008 Giuseppe Coviello <gicoviello@gmail.com> | 
|  | * | 
|  | * This file is licensed under the terms of the GNU General Public | 
|  | * License version 2.  This program is licensed "as is" without | 
|  | * any warranty of any kind, whether express or implied. | 
|  | */ | 
|  |  | 
|  | /dts-v1/; | 
|  |  | 
|  | / { | 
|  | #address-cells = <2>; | 
|  | #size-cells = <1>; | 
|  | model = "acube,sam440ep"; | 
|  | compatible = "acube,sam440ep"; | 
|  |  | 
|  | aliases { | 
|  | ethernet0 = &EMAC0; | 
|  | ethernet1 = &EMAC1; | 
|  | serial0 = &UART0; | 
|  | serial1 = &UART1; | 
|  | serial2 = &UART2; | 
|  | serial3 = &UART3; | 
|  | }; | 
|  |  | 
|  | cpus { | 
|  | #address-cells = <1>; | 
|  | #size-cells = <0>; | 
|  |  | 
|  | cpu@0 { | 
|  | device_type = "cpu"; | 
|  | model = "PowerPC,440EP"; | 
|  | reg = <0>; | 
|  | clock-frequency = <0>; /* Filled in by zImage */ | 
|  | timebase-frequency = <0>; /* Filled in by zImage */ | 
|  | i-cache-line-size = <32>; | 
|  | d-cache-line-size = <32>; | 
|  | i-cache-size = <32768>; | 
|  | d-cache-size = <32768>; | 
|  | dcr-controller; | 
|  | dcr-access-method = "native"; | 
|  | }; | 
|  | }; | 
|  |  | 
|  | memory { | 
|  | device_type = "memory"; | 
|  | reg = <0 0 0>; /* Filled in by zImage */ | 
|  | }; | 
|  |  | 
|  | UIC0: interrupt-controller0 { | 
|  | compatible = "ibm,uic-440ep","ibm,uic"; | 
|  | interrupt-controller; | 
|  | cell-index = <0>; | 
|  | dcr-reg = <0x0c0 9>; | 
|  | #address-cells = <0>; | 
|  | #size-cells = <0>; | 
|  | #interrupt-cells = <2>; | 
|  | }; | 
|  |  | 
|  | UIC1: interrupt-controller1 { | 
|  | compatible = "ibm,uic-440ep","ibm,uic"; | 
|  | interrupt-controller; | 
|  | cell-index = <1>; | 
|  | dcr-reg = <0x0d0 9>; | 
|  | #address-cells = <0>; | 
|  | #size-cells = <0>; | 
|  | #interrupt-cells = <2>; | 
|  | interrupts = <0x1e 4 0x1f 4>; /* cascade */ | 
|  | interrupt-parent = <&UIC0>; | 
|  | }; | 
|  |  | 
|  | SDR0: sdr { | 
|  | compatible = "ibm,sdr-440ep"; | 
|  | dcr-reg = <0x00e 2>; | 
|  | }; | 
|  |  | 
|  | CPR0: cpr { | 
|  | compatible = "ibm,cpr-440ep"; | 
|  | dcr-reg = <0x00c 2>; | 
|  | }; | 
|  |  | 
|  | plb { | 
|  | compatible = "ibm,plb-440ep", "ibm,plb-440gp", "ibm,plb4"; | 
|  | #address-cells = <2>; | 
|  | #size-cells = <1>; | 
|  | ranges; | 
|  | clock-frequency = <0>; /* Filled in by zImage */ | 
|  |  | 
|  | SDRAM0: sdram { | 
|  | compatible = "ibm,sdram-440ep", "ibm,sdram-405gp"; | 
|  | dcr-reg = <0x010 2>; | 
|  | }; | 
|  |  | 
|  | DMA0: dma { | 
|  | compatible = "ibm,dma-440ep", "ibm,dma-440gp"; | 
|  | dcr-reg = <0x100 0x027>; | 
|  | }; | 
|  |  | 
|  | MAL0: mcmal { | 
|  | compatible = "ibm,mcmal-440ep", "ibm,mcmal-440gp", "ibm,mcmal"; | 
|  | dcr-reg = <0x180 0x062>; | 
|  | num-tx-chans = <4>; | 
|  | num-rx-chans = <2>; | 
|  | interrupt-parent = <&MAL0>; | 
|  | interrupts = <0 1 2 3 4>; | 
|  | #interrupt-cells = <1>; | 
|  | #address-cells = <0>; | 
|  | #size-cells = <0>; | 
|  | interrupt-map = </*TXEOB*/ 0 &UIC0 10 4 | 
|  | /*RXEOB*/ 1 &UIC0 11 4 | 
|  | /*SERR*/  2 &UIC1 0 4 | 
|  | /*TXDE*/  3 &UIC1 1 4 | 
|  | /*RXDE*/  4 &UIC1 2 4>; | 
|  | }; | 
|  |  | 
|  | POB0: opb { | 
|  | compatible = "ibm,opb-440ep", "ibm,opb-440gp", "ibm,opb"; | 
|  | #address-cells = <1>; | 
|  | #size-cells = <1>; | 
|  | /* Bamboo is oddball in the 44x world and doesn't use the ERPN | 
|  | * bits. | 
|  | */ | 
|  | ranges = <0x00000000 0 0x00000000 0x80000000 | 
|  | 0x80000000 0 0x80000000 0x80000000>; | 
|  | interrupt-parent = <&UIC1>; | 
|  | interrupts = <7 4>; | 
|  | clock-frequency = <0>; /* Filled in by zImage */ | 
|  |  | 
|  | EBC0: ebc { | 
|  | compatible = "ibm,ebc-440ep", "ibm,ebc-440gp", "ibm,ebc"; | 
|  | dcr-reg = <0x012 2>; | 
|  | #address-cells = <2>; | 
|  | #size-cells = <1>; | 
|  | clock-frequency = <0>; /* Filled in by zImage */ | 
|  | interrupts = <5 1>; | 
|  | interrupt-parent = <&UIC1>; | 
|  | }; | 
|  |  | 
|  | UART0: serial@ef600300 { | 
|  | device_type = "serial"; | 
|  | compatible = "ns16550"; | 
|  | reg = <0xef600300 8>; | 
|  | virtual-reg = <0xef600300>; | 
|  | clock-frequency = <0>; /* Filled in by zImage */ | 
|  | current-speed = <0x1c200>; | 
|  | interrupt-parent = <&UIC0>; | 
|  | interrupts = <0 4>; | 
|  | }; | 
|  |  | 
|  | UART1: serial@ef600400 { | 
|  | device_type = "serial"; | 
|  | compatible = "ns16550"; | 
|  | reg = <0xef600400 8>; | 
|  | virtual-reg = <0xef600400>; | 
|  | clock-frequency = <0>; | 
|  | current-speed = <0>; | 
|  | interrupt-parent = <&UIC0>; | 
|  | interrupts = <1 4>; | 
|  | }; | 
|  |  | 
|  | UART2: serial@ef600500 { | 
|  | device_type = "serial"; | 
|  | compatible = "ns16550"; | 
|  | reg = <0xef600500 8>; | 
|  | virtual-reg = <0xef600500>; | 
|  | clock-frequency = <0>; | 
|  | current-speed = <0>; | 
|  | interrupt-parent = <&UIC0>; | 
|  | interrupts = <3 4>; | 
|  | }; | 
|  |  | 
|  | UART3: serial@ef600600 { | 
|  | device_type = "serial"; | 
|  | compatible = "ns16550"; | 
|  | reg = <0xef600600 8>; | 
|  | virtual-reg = <0xef600600>; | 
|  | clock-frequency = <0>; | 
|  | current-speed = <0>; | 
|  | interrupt-parent = <&UIC0>; | 
|  | interrupts = <4 4>; | 
|  | }; | 
|  |  | 
|  | IIC0: i2c@ef600700 { | 
|  | #address-cells = <1>; | 
|  | #size-cells = <0>; | 
|  | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 
|  | index = <0>; | 
|  | reg = <0xef600700 0x14>; | 
|  | interrupt-parent = <&UIC0>; | 
|  | interrupts = <2 4>; | 
|  | rtc@68 { | 
|  | compatible = "stm,m41t80"; | 
|  | reg = <0x68>; | 
|  | }; | 
|  | }; | 
|  |  | 
|  | IIC1: i2c@ef600800 { | 
|  | compatible = "ibm,iic-440ep", "ibm,iic-440gp", "ibm,iic"; | 
|  | index = <5>; | 
|  | reg = <0xef600800 0x14>; | 
|  | interrupt-parent = <&UIC0>; | 
|  | interrupts = <7 4>; | 
|  | }; | 
|  |  | 
|  | ZMII0: emac-zmii@ef600d00 { | 
|  | compatible = "ibm,zmii-440ep", "ibm,zmii-440gp", "ibm,zmii"; | 
|  | reg = <0xef600d00 0xc>; | 
|  | }; | 
|  |  | 
|  | EMAC0: ethernet@ef600e00 { | 
|  | linux,network-index = <0>; | 
|  | device_type = "network"; | 
|  | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 
|  | interrupt-parent = <&UIC1>; | 
|  | interrupts = <0x1c 4 0x1d 4>; | 
|  | reg = <0xef600e00 0x70>; | 
|  | local-mac-address = [000000000000]; | 
|  | mal-device = <&MAL0>; | 
|  | mal-tx-channel = <0 1>; | 
|  | mal-rx-channel = <0>; | 
|  | cell-index = <0>; | 
|  | max-frame-size = <0x5dc>; | 
|  | rx-fifo-size = <0x1000>; | 
|  | tx-fifo-size = <0x800>; | 
|  | phy-mode = "rmii"; | 
|  | phy-map = <00000000>; | 
|  | zmii-device = <&ZMII0>; | 
|  | zmii-channel = <0>; | 
|  | }; | 
|  |  | 
|  | EMAC1: ethernet@ef600f00 { | 
|  | linux,network-index = <1>; | 
|  | device_type = "network"; | 
|  | compatible = "ibm,emac-440ep", "ibm,emac-440gp", "ibm,emac"; | 
|  | interrupt-parent = <&UIC1>; | 
|  | interrupts = <0x1e 4 0x1f 4>; | 
|  | reg = <0xef600f00 0x70>; | 
|  | local-mac-address = [000000000000]; | 
|  | mal-device = <&MAL0>; | 
|  | mal-tx-channel = <2 3>; | 
|  | mal-rx-channel = <1>; | 
|  | cell-index = <1>; | 
|  | max-frame-size = <0x5dc>; | 
|  | rx-fifo-size = <0x1000>; | 
|  | tx-fifo-size = <0x800>; | 
|  | phy-mode = "rmii"; | 
|  | phy-map = <00000000>; | 
|  | zmii-device = <&ZMII0>; | 
|  | zmii-channel = <1>; | 
|  | }; | 
|  | usb@ef601000 { | 
|  | compatible = "ohci-be"; | 
|  | reg = <0xef601000 0x80>; | 
|  | interrupts = <8 4 9 4>; | 
|  | interrupt-parent = <&UIC1>; | 
|  | }; | 
|  | }; | 
|  |  | 
|  | PCI0: pci@ec000000 { | 
|  | device_type = "pci"; | 
|  | #interrupt-cells = <1>; | 
|  | #size-cells = <2>; | 
|  | #address-cells = <3>; | 
|  | compatible = "ibm,plb440ep-pci", "ibm,plb-pci"; | 
|  | primary; | 
|  | reg = <0 0xeec00000 8	   /* Config space access */ | 
|  | 0 0xeed00000 4	   /* IACK */ | 
|  | 0 0xeed00000 4	   /* Special cycle */ | 
|  | 0 0xef400000 0x40>; /* Internal registers */ | 
|  |  | 
|  | /* Outbound ranges, one memory and one IO, | 
|  | * later cannot be changed. Chip supports a second | 
|  | * IO range but we don't use it for now | 
|  | */ | 
|  | ranges = <0x02000000 0 0xa0000000 0 0xa0000000 0 0x20000000 | 
|  | 0x01000000 0 0x00000000 0 0xe8000000 0 0x00010000>; | 
|  |  | 
|  | /* Inbound 2GB range starting at 0 */ | 
|  | dma-ranges = <0x42000000 0 0 0 0 0 0x80000000>; | 
|  | }; | 
|  | }; | 
|  |  | 
|  | chosen { | 
|  | linux,stdout-path = "/plb/opb/serial@ef600300"; | 
|  | }; | 
|  | }; |