msm: idle-v7: SMP and AMP mode programming for 8x25 target
Program the Auxiliary Control Regiater(ACTLR.SMP) to switch
from Symmetric MultiProcessing Mode(SMP) to Asymmetric Multi
Processing Mode(AMP) while entering into the GDFS power mode.
This enables the CPU to be taken out of coherency by preventing
the CPU from receiving cache and TLB maintenance operations
broadcast by other CPUs in the system.
Change-Id: I74285e445e86cdb78a85705347550c762e47a0e2
Signed-off-by: Murali Nalajala <mnalajal@codeaurora.org>
diff --git a/arch/arm/mach-msm/idle.h b/arch/arm/mach-msm/idle.h
index df3045a..bfd632f 100644
--- a/arch/arm/mach-msm/idle.h
+++ b/arch/arm/mach-msm/idle.h
@@ -22,6 +22,10 @@
#define CPU_SAVED_STATE_SIZE (4 * 11 + 4 * 10)
#endif
+#define ON 1
+#define OFF 0
+#define TARGET_IS_8625 1
+
#ifndef __ASSEMBLY__
int msm_arch_idle(void);
@@ -35,6 +39,7 @@
void msm_pm_set_l2_flush_flag(unsigned int flag);
extern unsigned long msm_pm_pc_pgd;
extern unsigned long msm_pm_boot_vector[NR_CPUS];
+extern uint32_t target_type;
#else
static inline void msm_pm_set_l2_flush_flag(unsigned int flag)
{