commit 998ec2901aea9f412d2dc3e29a3c20f377793916
author Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp> Sun Oct 01 19:35:28 2006 +0900
committer Ralf Baechle <ralf@linux-mips.org> Sun Oct 01 23:16:59 2006 +0100
tree cb6a15e7445b5ac018342b17f9d39cda03f0a8fd
parent b00f3774f2e073d399ffbd0475337466938e9273

[MIPS] Add UART IRQ number for EV64120

Signed-off-by: Yoichi Yuasa <yoichi_yuasa@tripeaks.co.jp>
Signed-off-by: Ralf Baechle <ralf@linux-mips.org>

include/asm-mips/mach-ev64120/mach-gt64120.h

diff --git a/include/asm-mips/mach-ev64120/mach-gt64120.h b/include/asm-mips/mach-ev64120/mach-gt64120.h
index 13b1443..7e272ce5 100644
--- a/include/asm-mips/mach-ev64120/mach-gt64120.h
+++ b/include/asm-mips/mach-ev64120/mach-gt64120.h
@@ -42,6 +42,7 @@
 #define EV64120_UART0_REGS_BASE	(KSEG1ADDR(EV64120_COM1_BASE_ADDR))
 #define EV64120_UART1_REGS_BASE	(KSEG1ADDR(EV64120_COM2_BASE_ADDR))
 #define EV64120_BASE_BAUD ( 3686400 / 16 )
+#define EV64120_UART_IRQ	6
 
 /*
  * PCI interrupts will come in on either the INTA or INTD interrups lines,