msm: iomap: Add iomap for MSM9615
Signed-off-by: Rohit Vaswani <rvaswani@codeaurora.org>
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap-9615.h b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
new file mode 100644
index 0000000..b54924a
--- /dev/null
+++ b/arch/arm/mach-msm/include/mach/msm_iomap-9615.h
@@ -0,0 +1,62 @@
+/*
+ * Copyright (C) 2007 Google, Inc.
+ * Copyright (c) 2008-2011, Code Aurora Forum. All rights reserved.
+ * Author: Brian Swetland <swetland@google.com>
+ *
+ * This software is licensed under the terms of the GNU General Public
+ * License version 2, as published by the Free Software Foundation, and
+ * may be copied, distributed, and modified under those terms.
+ *
+ * This program is distributed in the hope that it will be useful,
+ * but WITHOUT ANY WARRANTY; without even the implied warranty of
+ * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
+ * GNU General Public License for more details.
+ *
+ *
+ * The MSM peripherals are spread all over across 768MB of physical
+ * space, which makes just having a simple IO_ADDRESS macro to slide
+ * them into the right virtual location rough. Instead, we will
+ * provide a master phys->virt mapping for peripherals here.
+ *
+ */
+
+#ifndef __ASM_ARCH_MSM_IOMAP_9615_H
+#define __ASM_ARCH_MSM_IOMAP_9615_H
+
+/* Physical base address and size of peripherals.
+ * Ordered by the virtual base addresses they will be mapped at.
+ *
+ * If you add or remove entries here, you'll want to edit the
+ * msm_io_desc array in arch/arm/mach-msm/io.c to reflect your
+ * changes.
+ *
+ */
+
+#define MSM9615_TMR_PHYS 0x0200A000
+#define MSM9615_TMR_SIZE SZ_4K
+
+#define MSM9615_QGIC_DIST_PHYS 0x02000000
+#define MSM9615_QGIC_DIST_SIZE SZ_4K
+
+#define MSM9615_QGIC_CPU_PHYS 0x02002000
+#define MSM9615_QGIC_CPU_SIZE SZ_4K
+
+#define MSM9615_DMOV_PHYS 0x18300000
+#define MSM9615_DMOV_SIZE SZ_1M
+
+#define MSM9615_TLMM_PHYS 0x00800000
+#define MSM9615_TLMM_SIZE SZ_1M
+
+#define MSM9615_ACC0_PHYS 0x02008000
+#define MSM9615_ACC0_SIZE SZ_4K
+
+#define MSM9615_APCS_GCC_PHYS 0x02010000
+#define MSM9615_APCS_GCC_SIZE SZ_4K
+
+#define MSM9615_SAW0_PHYS 0x02009000
+#define MSM9615_SAW0_SIZE SZ_4K
+
+#define MSM9615_TCSR_PHYS 0x1A400000
+#define MSM9615_TCSR_SIZE SZ_4K
+
+#endif
diff --git a/arch/arm/mach-msm/include/mach/msm_iomap.h b/arch/arm/mach-msm/include/mach/msm_iomap.h
index 384a192..fde3ede 100644
--- a/arch/arm/mach-msm/include/mach/msm_iomap.h
+++ b/arch/arm/mach-msm/include/mach/msm_iomap.h
@@ -43,7 +43,8 @@
#define IOMEM(x) ((void __force __iomem *)(x))
#endif
-#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064)
+#if defined(CONFIG_ARCH_MSM8960) || defined(CONFIG_ARCH_APQ8064) \
+ || defined(CONFIG_ARCH_MSM9615)
/* Unified iomap */
#define MSM_TMR_BASE IOMEM(0xFA000000) /* 4K */
@@ -77,6 +78,7 @@
#include "msm_iomap-8960.h"
#include "msm_iomap-8064.h"
+#include "msm_iomap-9615.h"
#else
/* Legacy single-target iomap */
diff --git a/arch/arm/mach-msm/io.c b/arch/arm/mach-msm/io.c
index f00842a..6288145 100644
--- a/arch/arm/mach-msm/io.c
+++ b/arch/arm/mach-msm/io.c
@@ -307,6 +307,30 @@
}
#endif /* CONFIG_ARCH_FSM9XXX */
+#ifdef CONFIG_ARCH_MSM9615
+static struct map_desc msm9615_io_desc[] __initdata = {
+ MSM_CHIP_DEVICE(QGIC_DIST, MSM9615),
+ MSM_CHIP_DEVICE(QGIC_CPU, MSM9615),
+ MSM_CHIP_DEVICE(ACC0, MSM9615),
+ MSM_CHIP_DEVICE(TMR, MSM9615),
+ MSM_CHIP_DEVICE(DMOV, MSM9615),
+ MSM_CHIP_DEVICE(TLMM, MSM9615),
+ MSM_CHIP_DEVICE(SAW0, MSM9615),
+ MSM_CHIP_DEVICE(APCS_GCC, MSM9615),
+ MSM_CHIP_DEVICE(TCSR, MSM9615),
+ {
+ .virtual = (unsigned long) MSM_SHARED_RAM_BASE,
+ .length = MSM_SHARED_RAM_SIZE,
+ .type = MT_DEVICE,
+ },
+};
+
+void __init msm_map_msm9615_io(void)
+{
+ msm_map_io(msm9615_io_desc, ARRAY_SIZE(msm9615_io_desc));
+}
+#endif /* CONFIG_ARCH_MSM9615 */
+
void __iomem *
__msm_ioremap(unsigned long phys_addr, size_t size, unsigned int mtype)
{