)]}'
{
  "commit": "a11b5abef50722e42a7d13f6b799c4f606fcb797",
  "tree": "eed224f07b6c8fc20cc4a454578e34721999b763",
  "parents": [
    "c59d85a7b7822b83fc9783314543eea0ca860480"
  ],
  "author": {
    "name": "Yinghai Lu",
    "email": "yhlu.kernel@gmail.com",
    "time": "Wed Sep 03 16:58:31 2008 -0700"
  },
  "committer": {
    "name": "Ingo Molnar",
    "email": "mingo@elte.hu",
    "time": "Thu Oct 16 16:53:04 2008 +0200"
  },
  "message": "x2apic: fix reserved APIC register accesses in print_local_APIC()\n\nAPIC_ARBPRI is a reserved register for XAPIC and beyond.\nAPIC_RRR is a reserved register except for 82489DX, APIC for Pentium processors.\nAPIC_EOI is a write only register.\nAPIC_DFR is reserved in x2apic mode.\n\nAccess to these registers in x2apic will result in #GP fault. Fix these\napic register accesses.\n\nSigned-off-by: Yinghai Lu \u003cyhlu.kernel@gmail.com\u003e\nSigned-off-by: Suresh Siddha \u003csuresh.b.siddha@intel.com\u003e\nCc: Maciej W. Rozycki \u003cmacro@linux-mips.org\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "d28128e0392c94c8bd0325fc4b9c4c239c0c81f6",
      "old_mode": 33188,
      "old_path": "arch/x86/kernel/io_apic.c",
      "new_id": "93ceb19d1e90e39cac4dfcfb7d1592bfd5d7267e",
      "new_mode": 33188,
      "new_path": "arch/x86/kernel/io_apic.c"
    },
    {
      "type": "modify",
      "old_id": "2d970f6bc2a101f459b497d27d7ae7927614fc12",
      "old_mode": 33188,
      "old_path": "include/asm-x86/apic.h",
      "new_id": "ef1d72dbdfe02b74d389c2067af12373db2cd3de",
      "new_mode": 33188,
      "new_path": "include/asm-x86/apic.h"
    }
  ]
}