msm: gpio: add chained_irq_enter/exit() to msm_gpio_irq_handler
Add chained IRQ enter/exit functions to gpio interrupt
handler in order to function correctly on primary controllers with
different methods of flow control.
As GIC implements the fasteoi flow control, we need to add the above
functions otherwise the system hangs whenever there is a gpio irq
triggered.
As 8625 having GIC as the primary controller it needs this change, but
for VIC users 7x27 and 7x27a it is still valid.
Change-Id: I4b55536d31a2ca7fcee82587c38bae457718d694
Signed-off-by: Taniya Das <tdas@codeaurora.org>
diff --git a/arch/arm/mach-msm/gpio.c b/arch/arm/mach-msm/gpio.c
index 5ad62265..a942862 100644
--- a/arch/arm/mach-msm/gpio.c
+++ b/arch/arm/mach-msm/gpio.c
@@ -20,6 +20,7 @@
#include <linux/io.h>
#include <linux/irq.h>
#include <linux/module.h>
+#include <asm/mach/irq.h>
#include <mach/gpiomux.h>
#include "gpio_hw.h"
#include "proc_comm.h"
@@ -337,6 +338,9 @@
{
int i, j, mask;
unsigned val;
+ struct irq_chip *chip = irq_desc_get_chip(desc);
+
+ chained_irq_enter(chip, desc);
for (i = 0; i < ARRAY_SIZE(msm_gpio_chips); i++) {
struct msm_gpio_chip *msm_chip = &msm_gpio_chips[i];
@@ -353,7 +357,8 @@
msm_chip->chip.base + j);
}
}
- desc->irq_data.chip->irq_ack(&desc->irq_data);
+
+ chained_irq_exit(chip, desc);
}
static struct irq_chip msm_gpio_irq_chip = {