)]}'
{
  "commit": "a77bc69138a4f52d003ca81d075f386953f6b25a",
  "tree": "01ea99eb0eaceff5c8771e9a88d4f5fdb9607ef8",
  "parents": [
    "ba8f5baba79da8eb502f8534c3a8ecb64aceb790"
  ],
  "author": {
    "name": "Lennert Buytenhek",
    "email": "buytenh@wantstofly.org",
    "time": "Fri Jun 02 19:51:50 2006 +0100"
  },
  "committer": {
    "name": "Russell King",
    "email": "rmk+kernel@arm.linux.org.uk",
    "time": "Fri Jun 02 19:51:50 2006 +0100"
  },
  "message": "[ARM] 3539/1: ixp23xx: fix __arch_ixp23xx_is_coherent() for A1 stepping\n\nPatch from Lennert Buytenhek\n\nThe current __ixp23xx_arch_is_coherent() check assumes that the\nlower byte of IXP23XX_PRODUCT_ID is identical to the lower byte of\nprocessor_id, but this is not the case, and because of this we were\nincorrectly enabling coherency on A1 stepping CPUs.\n\nStepping A1 of the ixp2350, which has a PRODUCT_ID of 0x401, has \u002702\u0027\nin the lower byte of processor_id, while A2, with a PRODUCT_ID of\n0x402, has \u002704\u0027 in the lower byte of processor_id.\n\nSo, to check for \u003e\u003d A2, we really need to check the lower byte of\nprocessor_id against \u003e\u003d 4.\n\nSigned-off-by: Lennert Buytenhek \u003cbuytenh@wantstofly.org\u003e\nSigned-off-by: Russell King \u003crmk+kernel@arm.linux.org.uk\u003e\n",
  "tree_diff": [
    {
      "type": "modify",
      "old_id": "6e19f46d54d1c2aaf947aca24fdc01c4569390fc",
      "old_mode": 33188,
      "old_path": "include/asm-arm/arch-ixp23xx/memory.h",
      "new_id": "c85fc06a043c10dc00392d72b3ef726aa40eece9",
      "new_mode": 33188,
      "new_path": "include/asm-arm/arch-ixp23xx/memory.h"
    }
  ]
}