msm: clock-8960: Lower frequency requirements of fpb active votes
We have an active set vote for the multimedia fpb and chip fpb so
that the registers are accessible whenever the processor is
awake. Unfortunately these requests are at the highest rate
supported which is not really necessary to ensure that the buses
are clocking. Lower the rate requests to the fastest speed that
doesn't require increasing voltages to allow the chip to hit low
voltages when the processor is awake.
Signed-off-by: Stephen Boyd <sboyd@codeaurora.org>
(cherry picked from commit 9e497f042d8525e57e11d417e9e37c2932a18dbf)
Change-Id: I3ee4926da0d953e7e31c3c64dffd11f6ee5edb72
Signed-off-by: Neha Pandey <nehap@codeaurora.org>
diff --git a/arch/arm/mach-msm/clock-8960.c b/arch/arm/mach-msm/clock-8960.c
index 28fafcb..31e8827 100644
--- a/arch/arm/mach-msm/clock-8960.c
+++ b/arch/arm/mach-msm/clock-8960.c
@@ -6749,22 +6749,22 @@
struct clk *mmfpb_a_clk = clk_get_sys("clock-8960", "mmfpb_a_clk");
struct clk *cfpb_a_clk = clk_get_sys("clock-8960", "cfpb_a_clk");
- /* Vote for MMFPB to be at least 76.8MHz when an Apps CPU is active. */
+ /* Vote for MMFPB to be on when Apps is active. */
if (WARN(IS_ERR(mmfpb_a_clk), "mmfpb_a_clk not found (%ld)\n",
PTR_ERR(mmfpb_a_clk)))
return PTR_ERR(mmfpb_a_clk);
- rc = clk_set_rate(mmfpb_a_clk, 76800000);
+ rc = clk_set_rate(mmfpb_a_clk, 38400000);
if (WARN(rc, "mmfpb_a_clk rate was not set (%d)\n", rc))
return rc;
rc = clk_prepare_enable(mmfpb_a_clk);
if (WARN(rc, "mmfpb_a_clk not enabled (%d)\n", rc))
return rc;
- /* Vote for CFPB to be at least 64MHz when an Apps CPU is active. */
+ /* Vote for CFPB to be on when Apps is active. */
if (WARN(IS_ERR(cfpb_a_clk), "cfpb_a_clk not found (%ld)\n",
PTR_ERR(cfpb_a_clk)))
return PTR_ERR(cfpb_a_clk);
- rc = clk_set_rate(cfpb_a_clk, 64000000);
+ rc = clk_set_rate(cfpb_a_clk, 32000000);
if (WARN(rc, "cfpb_a_clk rate was not set (%d)\n", rc))
return rc;
rc = clk_prepare_enable(cfpb_a_clk);