msm: board-8960: modify phy analog registers to pass signal quality
Signal quality tests like eye diagram depend on PHY
analog settings. These settings vary across different
revisions of boards that use synopsis 28nm PHY.
Use PHY initialization sequence platform data for this.
Change-Id: I010cdc8b2f89e5dcaa9840f3b4d8f1dcdcded07d
Signed-off-by: Anji jonnala <anjir@codeaurora.org>
diff --git a/arch/arm/mach-msm/board-8960.c b/arch/arm/mach-msm/board-8960.c
index 83fa49e..2b9b0be 100644
--- a/arch/arm/mach-msm/board-8960.c
+++ b/arch/arm/mach-msm/board-8960.c
@@ -822,6 +822,22 @@
vbus_is_on = false;
}
+static int wr_phy_init_seq[] = {
+ 0x44, 0x80, /* set VBUS valid threshold
+ and disconnect valid threshold */
+ 0x38, 0x81, /* update DC voltage level */
+ 0x14, 0x82, /* set preemphasis and rise/fall time */
+ 0x13, 0x83, /* set source impedance adjusment */
+ -1};
+
+static int liquid_v1_phy_init_seq[] = {
+ 0x44, 0x80,/* set VBUS valid threshold
+ and disconnect valid threshold */
+ 0x3C, 0x81,/* update DC voltage level */
+ 0x18, 0x82,/* set preemphasis and rise/fall time */
+ 0x23, 0x83,/* set source impedance sdjusment */
+ -1};
+
static struct msm_otg_platform_data msm_otg_pdata = {
.mode = USB_OTG,
.otg_control = OTG_PMIC_CONTROL,
@@ -2115,6 +2131,13 @@
if (machine_is_msm8960_liquid())
msm_otg_pdata.mhl_enable = true;
msm8960_device_otg.dev.platform_data = &msm_otg_pdata;
+ if (machine_is_msm8960_mtp() || machine_is_msm8960_fluid() ||
+ machine_is_msm8960_cdp()) {
+ msm_otg_pdata.phy_init_seq = wr_phy_init_seq;
+ } else if (machine_is_msm8960_liquid()) {
+ msm_otg_pdata.phy_init_seq =
+ liquid_v1_phy_init_seq;
+ }
#ifdef CONFIG_USB_EHCI_MSM_HSIC
if (machine_is_msm8960_liquid()) {
if (SOCINFO_VERSION_MAJOR(socinfo_get_version()) >= 2)
diff --git a/arch/arm/mach-msm/board-9615.c b/arch/arm/mach-msm/board-9615.c
index 724b3c5..0a2e102 100644
--- a/arch/arm/mach-msm/board-9615.c
+++ b/arch/arm/mach-msm/board-9615.c
@@ -674,6 +674,14 @@
vbus_is_on = false;
}
+static int shelby_phy_init_seq[] = {
+ 0x44, 0x80,/* set VBUS valid threshold and
+ disconnect valid threshold */
+ 0x38, 0x81, /* update DC voltage level */
+ 0x14, 0x82,/* set preemphasis and rise/fall time */
+ 0x13, 0x83,/* set source impedance adjustment */
+ -1};
+
static struct msm_otg_platform_data msm_otg_pdata = {
.mode = USB_OTG,
.otg_control = OTG_PHY_CONTROL,
@@ -766,6 +774,7 @@
pm8018_platform_data.num_regulators = msm_pm8018_regulator_pdata_len;
msm_device_otg.dev.platform_data = &msm_otg_pdata;
+ msm_otg_pdata.phy_init_seq = shelby_phy_init_seq;
platform_add_devices(common_devices, ARRAY_SIZE(common_devices));
acpuclk_init(&acpuclk_9615_soc_data);
diff --git a/drivers/usb/otg/msm_otg.c b/drivers/usb/otg/msm_otg.c
index f8b320f..dcb670a 100644
--- a/drivers/usb/otg/msm_otg.c
+++ b/drivers/usb/otg/msm_otg.c
@@ -506,14 +506,15 @@
return ret;
}
- ulpi_init(motg);
-
ret = msm_otg_link_reset(motg);
if (ret) {
dev_err(otg->dev, "link reset failed\n");
return ret;
}
msleep(100);
+
+ ulpi_init(motg);
+
/* Ensure that RESET operation is completed before turning off clock */
mb();