)]}'
{
  "commit": "ab608344bcbde4f55ec4cd911b686b0ce3eae076",
  "tree": "ebd38efabfaab59d6de11a24143d70e1eec36fae",
  "parents": [
    "2b0b5c6fe9b383f3cf35a0a6371c9d577bd523ff"
  ],
  "author": {
    "name": "Peter Zijlstra",
    "email": "peterz@infradead.org",
    "time": "Thu Apr 08 23:03:20 2010 +0200"
  },
  "committer": {
    "name": "Ingo Molnar",
    "email": "mingo@elte.hu",
    "time": "Fri May 07 11:31:02 2010 +0200"
  },
  "message": "perf, x86: Improve the PEBS ABI\n\nRename perf_event_attr::precise to perf_event_attr::precise_ip and\nwiden it to 2 bits. This new field describes the required precision of\nthe PERF_SAMPLE_IP field:\n\n  0 - SAMPLE_IP can have arbitrary skid\n  1 - SAMPLE_IP must have constant skid\n  2 - SAMPLE_IP requested to have 0 skid\n  3 - SAMPLE_IP must have 0 skid\n\nAnd modify the Intel PEBS code accordingly. The PEBS implementation\nnow supports up to precise_ip \u003d\u003d 2, where we perform the IP fixup.\n\nAlso s/PERF_RECORD_MISC_EXACT/\u0026_IP/ to clarify its meaning, this bit\nshould be set for each PERF_SAMPLE_IP field known to match the actual\ninstruction triggering the event.\n\nThis new scheme allows for a PEBS mode that uses the buffer for more\nthan a single event.\n\nSigned-off-by: Peter Zijlstra \u003ca.p.zijlstra@chello.nl\u003e\nCc: Paul Mackerras \u003cpaulus@samba.org\u003e\nCc: Stephane Eranian \u003ceranian@google.com\u003e\nLKML-Reference: \u003cnew-submission\u003e\nSigned-off-by: Ingo Molnar \u003cmingo@elte.hu\u003e\n",
  "tree_diff": [
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}