|  | /* | 
|  | * linux/arch/arm/boot/compressed/head-xscale.S | 
|  | * | 
|  | * XScale specific tweaks.  This is merged into head.S by the linker. | 
|  | * | 
|  | */ | 
|  |  | 
|  | #include <linux/linkage.h> | 
|  | #include <asm/mach-types.h> | 
|  |  | 
|  | .section        ".start", "ax" | 
|  |  | 
|  | __XScale_start: | 
|  |  | 
|  | @ Preserve r8/r7 i.e. kernel entry values | 
|  |  | 
|  | @ Data cache might be active. | 
|  | @ Be sure to flush kernel binary out of the cache, | 
|  | @ whatever state it is, before it is turned off. | 
|  | @ This is done by fetching through currently executed | 
|  | @ memory to be sure we hit the same cache. | 
|  | bic	r2, pc, #0x1f | 
|  | add	r3, r2, #0x10000	@ 64 kb is quite enough... | 
|  | 1:		ldr	r0, [r2], #32 | 
|  | teq	r2, r3 | 
|  | bne	1b | 
|  | mcr	p15, 0, r0, c7, c10, 4	@ drain WB | 
|  | mcr	p15, 0, r0, c7, c7, 0	@ flush I & D caches | 
|  |  | 
|  | @ disabling MMU and caches | 
|  | mrc	p15, 0, r0, c1, c0, 0	@ read control reg | 
|  | bic	r0, r0, #0x05		@ clear DC, MMU | 
|  | bic	r0, r0, #0x1000		@ clear Icache | 
|  | mcr	p15, 0, r0, c1, c0, 0 | 
|  |  | 
|  | #ifdef CONFIG_ARCH_LUBBOCK | 
|  | mov	r7, #MACH_TYPE_LUBBOCK | 
|  | #endif | 
|  |  | 
|  | #ifdef CONFIG_ARCH_COTULLA_IDP | 
|  | mov	r7, #MACH_TYPE_COTULLA_IDP | 
|  | #endif | 
|  |  | 
|  | #ifdef  CONFIG_MACH_GTWX5715 | 
|  | mov     r7, #(MACH_TYPE_GTWX5715 & 0xff) | 
|  | orr     r7, r7, #(MACH_TYPE_GTWX5715 & 0xff00) | 
|  | #endif | 
|  |  | 
|  | #ifdef CONFIG_ARCH_IXP2000 | 
|  | mov	r1, #-1 | 
|  | mov	r0, #0xd6000000 | 
|  | str	r1, [r0, #0x14] | 
|  | str	r1, [r0, #0x18] | 
|  | #endif | 
|  |  |