mfd: pm8xxx-pwm: add pre-divide=6 and update macros
Add pre-divide=6 and update the max period based on new pre-divide.
Also update pre-divide related macros for better readability.
Change-Id: I5298c373c78f8723dab9a735e4d94f89798800d5
Signed-off-by: Willie Ruan <wruan@codeaurora.org>
diff --git a/drivers/mfd/pm8xxx-pwm.c b/drivers/mfd/pm8xxx-pwm.c
index 523d3b6..b5e2092 100644
--- a/drivers/mfd/pm8xxx-pwm.c
+++ b/drivers/mfd/pm8xxx-pwm.c
@@ -152,29 +152,31 @@
#define CLK_PERIOD_MIN NSEC_19P2MHZ
#define CLK_PERIOD_MAX NSEC_1024HZ
-#define NUM_LPG_PRE_DIVIDE 3 /* No default support for pre-divide = 6 */
+#define NUM_LPG_PRE_DIVIDE 4
#define NUM_PWM_PRE_DIVIDE 2
-#define PRE_DIVIDE_0 2
-#define PRE_DIVIDE_1 3
-#define PRE_DIVIDE_2 5
-
-#define PRE_DIVIDE_MIN PRE_DIVIDE_0
-#define PRE_DIVIDE_MAX PRE_DIVIDE_2
+#define PRE_DIVIDE_2 2
+#define PRE_DIVIDE_3 3
+#define PRE_DIVIDE_5 5
+#define PRE_DIVIDE_6 6
static unsigned int pt_t[NUM_LPG_PRE_DIVIDE][NUM_CLOCKS] = {
- { PRE_DIVIDE_0 * NSEC_1024HZ,
- PRE_DIVIDE_0 * NSEC_32768HZ,
- PRE_DIVIDE_0 * NSEC_19P2MHZ,
- },
- { PRE_DIVIDE_1 * NSEC_1024HZ,
- PRE_DIVIDE_1 * NSEC_32768HZ,
- PRE_DIVIDE_1 * NSEC_19P2MHZ,
- },
{ PRE_DIVIDE_2 * NSEC_1024HZ,
PRE_DIVIDE_2 * NSEC_32768HZ,
PRE_DIVIDE_2 * NSEC_19P2MHZ,
},
+ { PRE_DIVIDE_3 * NSEC_1024HZ,
+ PRE_DIVIDE_3 * NSEC_32768HZ,
+ PRE_DIVIDE_3 * NSEC_19P2MHZ,
+ },
+ { PRE_DIVIDE_5 * NSEC_1024HZ,
+ PRE_DIVIDE_5 * NSEC_32768HZ,
+ PRE_DIVIDE_5 * NSEC_19P2MHZ,
+ },
+ { PRE_DIVIDE_6 * NSEC_1024HZ,
+ PRE_DIVIDE_6 * NSEC_32768HZ,
+ PRE_DIVIDE_6 * NSEC_19P2MHZ,
+ },
};
/* Private data */